1 | //===--- X86Target.def - X86 Feature/Processor Database ---------*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This file defines the X86-specific Features and Processors, as used by |
10 | // the X86 Targets. |
11 | // |
12 | //===----------------------------------------------------------------------===// |
13 | |
14 | #ifndef PROC_WITH_FEAT |
15 | #define PROC_WITH_FEAT(ENUM, STRING, IS64BIT, KEYFEATURE) \ |
16 | PROC(ENUM, STRING, IS64BIT) |
17 | #endif |
18 | |
19 | #ifndef PROC |
20 | #define PROC(ENUM, STRING, IS64BIT) |
21 | #endif |
22 | |
23 | #ifndef PROC_ALIAS |
24 | #define PROC_ALIAS(ENUM, ALIAS) |
25 | #endif |
26 | |
27 | #ifndef FEATURE |
28 | #define FEATURE(ENUM) |
29 | #endif |
30 | |
31 | #ifndef CPU_SPECIFIC |
32 | #define CPU_SPECIFIC(NAME, MANGLING, FEATURES) |
33 | #endif |
34 | |
35 | #ifndef CPU_SPECIFIC_ALIAS |
36 | #define CPU_SPECIFIC_ALIAS(NEW_NAME, NAME) |
37 | #endif |
38 | |
39 | #define PROC_64_BIT true |
40 | #define PROC_32_BIT false |
41 | |
42 | /// \name i386 |
43 | /// i386-generation processors. |
44 | //@{ |
45 | PROC(i386, "i386", PROC_32_BIT) |
46 | //@} |
47 | |
48 | /// \name i486 |
49 | /// i486-generation processors. |
50 | //@{ |
51 | PROC(i486, "i486", PROC_32_BIT) |
52 | PROC(WinChipC6, "winchip-c6", PROC_32_BIT) |
53 | PROC(WinChip2, "winchip2", PROC_32_BIT) |
54 | PROC(C3, "c3", PROC_32_BIT) |
55 | //@} |
56 | |
57 | /// \name i586 |
58 | /// i586-generation processors, P5 microarchitecture based. |
59 | //@{ |
60 | PROC(i586, "i586", PROC_32_BIT) |
61 | PROC(Pentium, "pentium", PROC_32_BIT) |
62 | PROC(PentiumMMX, "pentium-mmx", PROC_32_BIT) |
63 | //@} |
64 | |
65 | /// \name i686 |
66 | /// i686-generation processors, P6 / Pentium M microarchitecture based. |
67 | //@{ |
68 | PROC(PentiumPro, "pentiumpro", PROC_32_BIT) |
69 | PROC(i686, "i686", PROC_32_BIT) |
70 | PROC(Pentium2, "pentium2", PROC_32_BIT) |
71 | PROC(Pentium3, "pentium3", PROC_32_BIT) |
72 | PROC_ALIAS(Pentium3, "pentium3m") |
73 | PROC(PentiumM, "pentium-m", PROC_32_BIT) |
74 | PROC(C3_2, "c3-2", PROC_32_BIT) |
75 | |
76 | /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah. |
77 | /// Clang however has some logic to support this. |
78 | // FIXME: Warn, deprecate, and potentially remove this. |
79 | PROC(Yonah, "yonah", PROC_32_BIT) |
80 | //@} |
81 | |
82 | /// \name Netburst |
83 | /// Netburst microarchitecture based processors. |
84 | //@{ |
85 | PROC(Pentium4, "pentium4", PROC_32_BIT) |
86 | PROC_ALIAS(Pentium4, "pentium4m") |
87 | |
88 | PROC(Prescott, "prescott", PROC_32_BIT) |
89 | PROC(Nocona, "nocona", PROC_64_BIT) |
90 | //@} |
91 | |
92 | /// \name Core |
93 | /// Core microarchitecture based processors. |
94 | //@{ |
95 | PROC_WITH_FEAT(Core2, "core2", PROC_64_BIT, FEATURE_SSSE3) |
96 | |
97 | /// This enumerator, like Yonah, is a bit odd. It is another |
98 | /// codename which GCC no longer accepts as an option to -march, but Clang |
99 | /// has some logic for recognizing it. |
100 | // FIXME: Warn, deprecate, and potentially remove this. |
101 | PROC(Penryn, "penryn", PROC_64_BIT) |
102 | //@} |
103 | |
104 | /// \name Atom |
105 | /// Atom processors |
106 | //@{ |
107 | PROC_WITH_FEAT(Bonnell, "bonnell", PROC_64_BIT, FEATURE_SSSE3) |
108 | PROC_ALIAS(Bonnell, "atom") |
109 | |
110 | PROC_WITH_FEAT(Silvermont, "silvermont", PROC_64_BIT, FEATURE_SSE4_2) |
111 | PROC_ALIAS(Silvermont, "slm") |
112 | |
113 | PROC(Goldmont, "goldmont", PROC_64_BIT) |
114 | PROC(GoldmontPlus, "goldmont-plus", PROC_64_BIT) |
115 | |
116 | PROC(Tremont, "tremont", PROC_64_BIT) |
117 | //@} |
118 | |
119 | /// \name Nehalem |
120 | /// Nehalem microarchitecture based processors. |
121 | PROC_WITH_FEAT(Nehalem, "nehalem", PROC_64_BIT, FEATURE_SSE4_2) |
122 | PROC_ALIAS(Nehalem, "corei7") |
123 | |
124 | /// \name Westmere |
125 | /// Westmere microarchitecture based processors. |
126 | PROC_WITH_FEAT(Westmere, "westmere", PROC_64_BIT, FEATURE_PCLMUL) |
127 | |
128 | /// \name Sandy Bridge |
129 | /// Sandy Bridge microarchitecture based processors. |
130 | PROC_WITH_FEAT(SandyBridge, "sandybridge", PROC_64_BIT, FEATURE_AVX) |
131 | PROC_ALIAS(SandyBridge, "corei7-avx") |
132 | |
133 | /// \name Ivy Bridge |
134 | /// Ivy Bridge microarchitecture based processors. |
135 | PROC_WITH_FEAT(IvyBridge, "ivybridge", PROC_64_BIT, FEATURE_AVX) |
136 | PROC_ALIAS(IvyBridge, "core-avx-i") |
137 | |
138 | /// \name Haswell |
139 | /// Haswell microarchitecture based processors. |
140 | PROC_WITH_FEAT(Haswell, "haswell", PROC_64_BIT, FEATURE_AVX2) |
141 | PROC_ALIAS(Haswell, "core-avx2") |
142 | |
143 | /// \name Broadwell |
144 | /// Broadwell microarchitecture based processors. |
145 | PROC_WITH_FEAT(Broadwell, "broadwell", PROC_64_BIT, FEATURE_AVX2) |
146 | |
147 | /// \name Skylake Client |
148 | /// Skylake client microarchitecture based processors. |
149 | PROC_WITH_FEAT(SkylakeClient, "skylake", PROC_64_BIT, FEATURE_AVX2) |
150 | |
151 | /// \name Skylake Server |
152 | /// Skylake server microarchitecture based processors. |
153 | PROC_WITH_FEAT(SkylakeServer, "skylake-avx512", PROC_64_BIT, FEATURE_AVX512F) |
154 | PROC_ALIAS(SkylakeServer, "skx") |
155 | |
156 | /// \name Cascadelake Server |
157 | /// Cascadelake Server microarchitecture based processors. |
158 | PROC_WITH_FEAT(Cascadelake, "cascadelake", PROC_64_BIT, FEATURE_AVX512VNNI) |
159 | |
160 | /// \name Cannonlake Client |
161 | /// Cannonlake client microarchitecture based processors. |
162 | PROC_WITH_FEAT(Cannonlake, "cannonlake", PROC_64_BIT, FEATURE_AVX512VBMI) |
163 | |
164 | /// \name Icelake Client |
165 | /// Icelake client microarchitecture based processors. |
166 | PROC(IcelakeClient, "icelake-client", PROC_64_BIT) |
167 | |
168 | /// \name Icelake Server |
169 | /// Icelake server microarchitecture based processors. |
170 | PROC(IcelakeServer, "icelake-server", PROC_64_BIT) |
171 | |
172 | /// \name Knights Landing |
173 | /// Knights Landing processor. |
174 | PROC_WITH_FEAT(KNL, "knl", PROC_64_BIT, FEATURE_AVX512F) |
175 | |
176 | /// \name Knights Mill |
177 | /// Knights Mill processor. |
178 | PROC_WITH_FEAT(KNM, "knm", PROC_64_BIT, FEATURE_AVX5124FMAPS) |
179 | |
180 | /// \name Lakemont |
181 | /// Lakemont microarchitecture based processors. |
182 | PROC(Lakemont, "lakemont", PROC_32_BIT) |
183 | |
184 | /// \name K6 |
185 | /// K6 architecture processors. |
186 | //@{ |
187 | PROC(K6, "k6", PROC_32_BIT) |
188 | PROC(K6_2, "k6-2", PROC_32_BIT) |
189 | PROC(K6_3, "k6-3", PROC_32_BIT) |
190 | //@} |
191 | |
192 | /// \name K7 |
193 | /// K7 architecture processors. |
194 | //@{ |
195 | PROC(Athlon, "athlon", PROC_32_BIT) |
196 | PROC_ALIAS(Athlon, "athlon-tbird") |
197 | |
198 | PROC(AthlonXP, "athlon-xp", PROC_32_BIT) |
199 | PROC_ALIAS(AthlonXP, "athlon-mp") |
200 | PROC_ALIAS(AthlonXP, "athlon-4") |
201 | //@} |
202 | |
203 | /// \name K8 |
204 | /// K8 architecture processors. |
205 | //@{ |
206 | PROC(K8, "k8", PROC_64_BIT) |
207 | PROC_ALIAS(K8, "athlon64") |
208 | PROC_ALIAS(K8, "athlon-fx") |
209 | PROC_ALIAS(K8, "opteron") |
210 | |
211 | PROC(K8SSE3, "k8-sse3", PROC_64_BIT) |
212 | PROC_ALIAS(K8SSE3, "athlon64-sse3") |
213 | PROC_ALIAS(K8SSE3, "opteron-sse3") |
214 | |
215 | PROC_WITH_FEAT(AMDFAM10, "amdfam10", PROC_64_BIT, FEATURE_SSE4_A) |
216 | PROC_ALIAS(AMDFAM10, "barcelona") |
217 | //@} |
218 | |
219 | /// \name Bobcat |
220 | /// Bobcat architecture processors. |
221 | //@{ |
222 | PROC_WITH_FEAT(BTVER1, "btver1", PROC_64_BIT, FEATURE_SSE4_A) |
223 | PROC_WITH_FEAT(BTVER2, "btver2", PROC_64_BIT, FEATURE_BMI) |
224 | //@} |
225 | |
226 | /// \name Bulldozer |
227 | /// Bulldozer architecture processors. |
228 | //@{ |
229 | PROC_WITH_FEAT(BDVER1, "bdver1", PROC_64_BIT, FEATURE_XOP) |
230 | PROC_WITH_FEAT(BDVER2, "bdver2", PROC_64_BIT, FEATURE_FMA) |
231 | PROC_WITH_FEAT(BDVER3, "bdver3", PROC_64_BIT, FEATURE_FMA) |
232 | PROC_WITH_FEAT(BDVER4, "bdver4", PROC_64_BIT, FEATURE_AVX2) |
233 | //@} |
234 | |
235 | /// \name zen |
236 | /// Zen architecture processors. |
237 | //@{ |
238 | PROC_WITH_FEAT(ZNVER1, "znver1", PROC_64_BIT, FEATURE_AVX2) |
239 | PROC_WITH_FEAT(ZNVER2, "znver2", PROC_64_BIT, FEATURE_AVX2) |
240 | //@} |
241 | |
242 | /// This specification is deprecated and will be removed in the future. |
243 | /// Users should prefer K8. |
244 | // FIXME: Warn on this when the CPU is set to it. |
245 | //@{ |
246 | PROC(x86_64, "x86-64", PROC_64_BIT) |
247 | //@} |
248 | |
249 | /// \name Geode |
250 | /// Geode processors. |
251 | //@{ |
252 | PROC(Geode, "geode", PROC_32_BIT) |
253 | //@} |
254 | |
255 | // List of CPU Supports features in order. These need to remain in the order |
256 | // required by attribute 'target' checking. Note that not all are supported/ |
257 | // prioritized by GCC, so synchronization with GCC's implementation may require |
258 | // changing some existing values. |
259 | FEATURE(FEATURE_CMOV) |
260 | FEATURE(FEATURE_MMX) |
261 | FEATURE(FEATURE_SSE) |
262 | FEATURE(FEATURE_SSE2) |
263 | FEATURE(FEATURE_SSE3) |
264 | FEATURE(FEATURE_SSSE3) |
265 | FEATURE(FEATURE_SSE4_A) |
266 | FEATURE(FEATURE_SSE4_1) |
267 | FEATURE(FEATURE_SSE4_2) |
268 | FEATURE(FEATURE_POPCNT) |
269 | FEATURE(FEATURE_AES) |
270 | FEATURE(FEATURE_PCLMUL) |
271 | FEATURE(FEATURE_AVX) |
272 | FEATURE(FEATURE_BMI) |
273 | FEATURE(FEATURE_FMA4) |
274 | FEATURE(FEATURE_XOP) |
275 | FEATURE(FEATURE_FMA) |
276 | FEATURE(FEATURE_BMI2) |
277 | FEATURE(FEATURE_AVX2) |
278 | FEATURE(FEATURE_AVX512F) |
279 | FEATURE(FEATURE_AVX512VL) |
280 | FEATURE(FEATURE_AVX512BW) |
281 | FEATURE(FEATURE_AVX512DQ) |
282 | FEATURE(FEATURE_AVX512CD) |
283 | FEATURE(FEATURE_AVX512ER) |
284 | FEATURE(FEATURE_AVX512PF) |
285 | FEATURE(FEATURE_AVX512VBMI) |
286 | FEATURE(FEATURE_AVX512IFMA) |
287 | FEATURE(FEATURE_AVX5124VNNIW) |
288 | FEATURE(FEATURE_AVX5124FMAPS) |
289 | FEATURE(FEATURE_AVX512VPOPCNTDQ) |
290 | FEATURE(FEATURE_AVX512VBMI2) |
291 | FEATURE(FEATURE_GFNI) |
292 | FEATURE(FEATURE_VPCLMULQDQ) |
293 | FEATURE(FEATURE_AVX512VNNI) |
294 | FEATURE(FEATURE_AVX512BITALG) |
295 | |
296 | |
297 | // FIXME: When commented out features are supported in LLVM, enable them here. |
298 | CPU_SPECIFIC("generic", 'A', "") |
299 | CPU_SPECIFIC("pentium", 'B', "") |
300 | CPU_SPECIFIC("pentium_pro", 'C', "+cmov") |
301 | CPU_SPECIFIC("pentium_mmx", 'D', "+mmx") |
302 | CPU_SPECIFIC("pentium_ii", 'E', "+cmov,+mmx") |
303 | CPU_SPECIFIC("pentium_iii", 'H', "+cmov,+mmx,+sse") |
304 | CPU_SPECIFIC_ALIAS("pentium_iii_no_xmm_regs", "pentium_iii") |
305 | CPU_SPECIFIC("pentium_4", 'J', "+cmov,+mmx,+sse,+sse2") |
306 | CPU_SPECIFIC("pentium_m", 'K', "+cmov,+mmx,+sse,+sse2") |
307 | CPU_SPECIFIC("pentium_4_sse3", 'L', "+cmov,+mmx,+sse,+sse2,+sse3") |
308 | CPU_SPECIFIC("core_2_duo_ssse3", 'M', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3") |
309 | CPU_SPECIFIC("core_2_duo_sse4_1", 'N', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1") |
310 | CPU_SPECIFIC("atom", 'O', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+movbe") |
311 | CPU_SPECIFIC("atom_sse4_2", 'c', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt") |
312 | CPU_SPECIFIC("core_i7_sse4_2", 'P', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt") |
313 | CPU_SPECIFIC("core_aes_pclmulqdq", 'Q', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt") |
314 | CPU_SPECIFIC("atom_sse4_2_movbe", 'd', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt") |
315 | CPU_SPECIFIC("goldmont", 'i', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt") |
316 | CPU_SPECIFIC("sandybridge", 'R', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt,+avx") |
317 | CPU_SPECIFIC_ALIAS("core_2nd_gen_avx", "sandybridge") |
318 | CPU_SPECIFIC("ivybridge", 'S', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt,+f16c,+avx") |
319 | CPU_SPECIFIC_ALIAS("core_3rd_gen_avx", "ivybridge") |
320 | CPU_SPECIFIC("haswell", 'V', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2") |
321 | CPU_SPECIFIC_ALIAS("core_4th_gen_avx", "haswell") |
322 | CPU_SPECIFIC("core_4th_gen_avx_tsx", 'W', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2") |
323 | CPU_SPECIFIC("broadwell", 'X', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx") |
324 | CPU_SPECIFIC_ALIAS("core_5th_gen_avx", "broadwell") |
325 | CPU_SPECIFIC("core_5th_gen_avx_tsx", 'Y', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx") |
326 | CPU_SPECIFIC("knl", 'Z', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512f,+adx,+avx512er,+avx512pf,+avx512cd") |
327 | CPU_SPECIFIC_ALIAS("mic_avx512", "knl") |
328 | CPU_SPECIFIC("skylake", 'b', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx,+mpx") |
329 | CPU_SPECIFIC( "skylake_avx512", 'a', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512dq,+avx512f,+adx,+avx512cd,+avx512bw,+avx512vl,+clwb") |
330 | CPU_SPECIFIC("cannonlake", 'e', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512dq,+avx512f,+adx,+avx512ifma,+avx512cd,+avx512bw,+avx512vl,+avx512vbmi") |
331 | CPU_SPECIFIC("knm", 'j', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512f,+adx,+avx512er,+avx512pf,+avx512cd,+avx5124fmaps,+avx5124vnniw,+avx512vpopcntdq") |
332 | |
333 | #undef CPU_SPECIFIC_ALIAS |
334 | #undef CPU_SPECIFIC |
335 | #undef PROC_64_BIT |
336 | #undef PROC_32_BIT |
337 | #undef FEATURE |
338 | #undef PROC |
339 | #undef PROC_ALIAS |
340 | #undef PROC_WITH_FEAT |
341 | |