| 1 | // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \ |
| 2 | // RUN: -disable-O0-optnone -ffp-contract=fast -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s |
| 3 | |
| 4 | #include <arm_neon.h> |
| 5 | |
| 6 | uint8x8_t test_shift_vshr(uint8x8_t a) { |
| 7 | // CHECK-LABEL: test_shift_vshr |
| 8 | // CHECK: %{{.*}} = lshr <8 x i8> %a, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5> |
| 9 | return vshr_n_u8(a, 5); |
| 10 | } |
| 11 | |
| 12 | int8x8_t test_shift_vshr_smax(int8x8_t a) { |
| 13 | // CHECK-LABEL: test_shift_vshr_smax |
| 14 | // CHECK: %{{.*}} = ashr <8 x i8> %a, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7> |
| 15 | return vshr_n_s8(a, 8); |
| 16 | } |
| 17 | |
| 18 | uint8x8_t test_shift_vshr_umax(uint8x8_t a) { |
| 19 | // CHECK-LABEL: test_shift_vshr_umax |
| 20 | // CHECK: ret <8 x i8> zeroinitializer |
| 21 | return vshr_n_u8(a, 8); |
| 22 | } |
| 23 | |
| 24 | uint8x8_t test_shift_vsra(uint8x8_t a, uint8x8_t b) { |
| 25 | // CHECK-LABEL: test_shift_vsra |
| 26 | // CHECK: %[[SHR:.*]] = lshr <8 x i8> %b, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5> |
| 27 | // CHECK: %{{.*}} = add <8 x i8> %a, %[[SHR]] |
| 28 | return vsra_n_u8(a, b, 5); |
| 29 | } |
| 30 | |
| 31 | int8x8_t test_shift_vsra_smax(int8x8_t a, int8x8_t b) { |
| 32 | // CHECK-LABEL: test_shift_vsra_smax |
| 33 | // CHECK: %[[SHR:.*]] = ashr <8 x i8> %b, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7> |
| 34 | // CHECK: %{{.*}} = add <8 x i8> %a, %[[SHR]] |
| 35 | return vsra_n_s8(a, b, 8); |
| 36 | } |
| 37 | |
| 38 | uint8x8_t test_shift_vsra_umax(uint8x8_t a, uint8x8_t b) { |
| 39 | // CHECK-LABEL: test_shift_vsra_umax |
| 40 | // CHECK: [[RES:%.*]] = add <8 x i8> %a, zeroinitializer |
| 41 | // CHECK: ret <8 x i8> [[RES]] |
| 42 | return vsra_n_u8(a, b, 8); |
| 43 | } |
| 44 | |