1 | // RUN: %clang_cc1 -triple armv8-none-linux-gnueabi \ |
2 | // RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s |
3 | |
4 | int crc32b(int a, char b) |
5 | { |
6 | return __builtin_arm_crc32b(a,b); |
7 | // CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32 |
8 | // CHECK: call i32 @llvm.arm.crc32b(i32 %a, i32 [[T0]]) |
9 | } |
10 | |
11 | int crc32cb(int a, char b) |
12 | { |
13 | return __builtin_arm_crc32cb(a,b); |
14 | // CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32 |
15 | // CHECK: call i32 @llvm.arm.crc32cb(i32 %a, i32 [[T0]]) |
16 | } |
17 | |
18 | int crc32h(int a, short b) |
19 | { |
20 | return __builtin_arm_crc32h(a,b); |
21 | // CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32 |
22 | // CHECK: call i32 @llvm.arm.crc32h(i32 %a, i32 [[T0]]) |
23 | } |
24 | |
25 | int crc32ch(int a, short b) |
26 | { |
27 | return __builtin_arm_crc32ch(a,b); |
28 | // CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32 |
29 | // CHECK: call i32 @llvm.arm.crc32ch(i32 %a, i32 [[T0]]) |
30 | } |
31 | |
32 | int crc32w(int a, int b) |
33 | { |
34 | return __builtin_arm_crc32w(a,b); |
35 | // CHECK: call i32 @llvm.arm.crc32w(i32 %a, i32 %b) |
36 | } |
37 | |
38 | int crc32cw(int a, int b) |
39 | { |
40 | return __builtin_arm_crc32cw(a,b); |
41 | // CHECK: call i32 @llvm.arm.crc32cw(i32 %a, i32 %b) |
42 | } |
43 | |
44 | int crc32d(int a, long long b) |
45 | { |
46 | return __builtin_arm_crc32d(a,b); |
47 | // CHECK: [[T0:%[0-9]+]] = trunc i64 %b to i32 |
48 | // CHECK: [[T1:%[0-9]+]] = lshr i64 %b, 32 |
49 | // CHECK: [[T2:%[0-9]+]] = trunc i64 [[T1]] to i32 |
50 | // CHECK: [[T3:%[0-9]+]] = call i32 @llvm.arm.crc32w(i32 %a, i32 [[T0]]) |
51 | // CHECK: call i32 @llvm.arm.crc32w(i32 [[T3]], i32 [[T2]]) |
52 | } |
53 | |
54 | int crc32cd(int a, long long b) |
55 | { |
56 | return __builtin_arm_crc32cd(a,b); |
57 | // CHECK: [[T0:%[0-9]+]] = trunc i64 %b to i32 |
58 | // CHECK: [[T1:%[0-9]+]] = lshr i64 %b, 32 |
59 | // CHECK: [[T2:%[0-9]+]] = trunc i64 [[T1]] to i32 |
60 | // CHECK: [[T3:%[0-9]+]] = call i32 @llvm.arm.crc32cw(i32 %a, i32 [[T0]]) |
61 | // CHECK: call i32 @llvm.arm.crc32cw(i32 [[T3]], i32 [[T2]]) |
62 | } |
63 | |