1 | // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 \ |
2 | // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \ |
3 | // RUN: opt -S -mem2reg | FileCheck -check-prefixes=CHECK,CHECK-A32 %s |
4 | // RUN: %clang_cc1 -triple arm64-linux-gnueabihf -target-feature +neon \ |
5 | // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \ |
6 | // RUN: opt -S -mem2reg | FileCheck -check-prefixes=CHECK,CHECK-A64 %s |
7 | |
8 | #include <arm_neon.h> |
9 | |
10 | // CHECK-LABEL: define <2 x float> @test_vrnda_f32(<2 x float> %a) |
11 | // CHECK-A32: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrinta.v2f32(<2 x float> %a) |
12 | // CHECK-A64: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.round.v2f32(<2 x float> %a) |
13 | // CHECK: ret <2 x float> [[VRNDA_V1_I]] |
14 | float32x2_t test_vrnda_f32(float32x2_t a) { |
15 | return vrnda_f32(a); |
16 | } |
17 | |
18 | // CHECK-LABEL: define <4 x float> @test_vrndaq_f32(<4 x float> %a) |
19 | // CHECK-A32: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrinta.v4f32(<4 x float> %a) |
20 | // CHECK-A64: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x float> %a) |
21 | // CHECK: ret <4 x float> [[VRNDAQ_V1_I]] |
22 | float32x4_t test_vrndaq_f32(float32x4_t a) { |
23 | return vrndaq_f32(a); |
24 | } |
25 | |
26 | // CHECK-LABEL: define <2 x float> @test_vrndm_f32(<2 x float> %a) |
27 | // CHECK-A32: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintm.v2f32(<2 x float> %a) |
28 | // CHECK-A64: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> %a) |
29 | // CHECK: ret <2 x float> [[VRNDM_V1_I]] |
30 | float32x2_t test_vrndm_f32(float32x2_t a) { |
31 | return vrndm_f32(a); |
32 | } |
33 | |
34 | // CHECK-LABEL: define <4 x float> @test_vrndmq_f32(<4 x float> %a) |
35 | // CHECK-A32: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintm.v4f32(<4 x float> %a) |
36 | // CHECK-A64: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.floor.v4f32(<4 x float> %a) |
37 | // CHECK: ret <4 x float> [[VRNDMQ_V1_I]] |
38 | float32x4_t test_vrndmq_f32(float32x4_t a) { |
39 | return vrndmq_f32(a); |
40 | } |
41 | |
42 | // CHECK-LABEL: define <2 x float> @test_vrndn_f32(<2 x float> %a) |
43 | // CHECK-A32: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintn.v2f32(<2 x float> %a) |
44 | // CHECK-A64: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float> %a) |
45 | // CHECK: ret <2 x float> [[VRNDN_V1_I]] |
46 | float32x2_t test_vrndn_f32(float32x2_t a) { |
47 | return vrndn_f32(a); |
48 | } |
49 | |
50 | // CHECK-LABEL: define <4 x float> @test_vrndnq_f32(<4 x float> %a) |
51 | // CHECK-A32: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintn.v4f32(<4 x float> %a) |
52 | // CHECK-A64: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float> %a) |
53 | // CHECK: ret <4 x float> [[VRNDNQ_V1_I]] |
54 | float32x4_t test_vrndnq_f32(float32x4_t a) { |
55 | return vrndnq_f32(a); |
56 | } |
57 | |
58 | // CHECK-LABEL: define <2 x float> @test_vrndp_f32(<2 x float> %a) |
59 | // CHECK-A32: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintp.v2f32(<2 x float> %a) |
60 | // CHECK-A64: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> %a) |
61 | // CHECK: ret <2 x float> [[VRNDP_V1_I]] |
62 | float32x2_t test_vrndp_f32(float32x2_t a) { |
63 | return vrndp_f32(a); |
64 | } |
65 | |
66 | // CHECK-LABEL: define <4 x float> @test_vrndpq_f32(<4 x float> %a) |
67 | // CHECK-A32: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintp.v4f32(<4 x float> %a) |
68 | // CHECK-A64: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.ceil.v4f32(<4 x float> %a) |
69 | // CHECK: ret <4 x float> [[VRNDPQ_V1_I]] |
70 | float32x4_t test_vrndpq_f32(float32x4_t a) { |
71 | return vrndpq_f32(a); |
72 | } |
73 | |
74 | // CHECK-LABEL: define <2 x float> @test_vrndx_f32(<2 x float> %a) |
75 | // CHECK-A32: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintx.v2f32(<2 x float> %a) |
76 | // CHECK-A64: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.rint.v2f32(<2 x float> %a) |
77 | // CHECK: ret <2 x float> [[VRNDX_V1_I]] |
78 | float32x2_t test_vrndx_f32(float32x2_t a) { |
79 | return vrndx_f32(a); |
80 | } |
81 | |
82 | // CHECK-LABEL: define <4 x float> @test_vrndxq_f32(<4 x float> %a) |
83 | // CHECK-A32: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintx.v4f32(<4 x float> %a) |
84 | // CHECK-A64: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.rint.v4f32(<4 x float> %a) |
85 | // CHECK: ret <4 x float> [[VRNDXQ_V1_I]] |
86 | float32x4_t test_vrndxq_f32(float32x4_t a) { |
87 | return vrndxq_f32(a); |
88 | } |
89 | |
90 | // CHECK-LABEL: define <2 x float> @test_vrnd_f32(<2 x float> %a) |
91 | // CHECK-A32: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintz.v2f32(<2 x float> %a) |
92 | // CHECK-A64: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.trunc.v2f32(<2 x float> %a) |
93 | // CHECK: ret <2 x float> [[VRND_V1_I]] |
94 | float32x2_t test_vrnd_f32(float32x2_t a) { |
95 | return vrnd_f32(a); |
96 | } |
97 | |
98 | // CHECK-LABEL: define <4 x float> @test_vrndq_f32(<4 x float> %a) |
99 | // CHECK-A32: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintz.v4f32(<4 x float> %a) |
100 | // CHECK-A64: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.trunc.v4f32(<4 x float> %a) |
101 | // CHECK: ret <4 x float> [[VRNDQ_V1_I]] |
102 | float32x4_t test_vrndq_f32(float32x4_t a) { |
103 | return vrndq_f32(a); |
104 | } |
105 | |
106 | // CHECK-LABEL: define float @test_vrndns_f32(float %a) |
107 | // CHECK-A32: [[VRNDN_I:%.*]] = call float @llvm.arm.neon.vrintn.f32(float %a) |
108 | // CHECK-A64: [[VRNDN_I:%.*]] = call float @llvm.aarch64.neon.frintn.f32(float %a) |
109 | // CHECK: ret float [[VRNDN_I]] |
110 | float32_t test_vrndns_f32(float32_t a) { |
111 | return vrndns_f32(a); |
112 | } |
113 | |
114 | // CHECK-LABEL: define <2 x float> @test_vrndi_f32(<2 x float> %a) |
115 | // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> |
116 | // CHECK: [[VRNDI1_I:%.*]] = call <2 x float> @llvm.nearbyint.v2f32(<2 x float> %a) |
117 | // CHECK: ret <2 x float> [[VRNDI1_I]] |
118 | float32x2_t test_vrndi_f32(float32x2_t a) { |
119 | return vrndi_f32(a); |
120 | } |
121 | |
122 | // CHECK-LABEL: define <4 x float> @test_vrndiq_f32(<4 x float> %a) |
123 | // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> |
124 | // CHECK: [[VRNDI1_I:%.*]] = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %a) |
125 | // CHECK: ret <4 x float> [[VRNDI1_I]] |
126 | float32x4_t test_vrndiq_f32(float32x4_t a) { |
127 | return vrndiq_f32(a); |
128 | } |
129 | |