| 1 | // RUN: %clang_cc1 -triple armv8-linux-gnueabihf -target-cpu cortex-a75 -target-feature +dotprod \ |
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| 2 | // RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -instcombine | FileCheck %s |
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| 3 | |
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| 4 | // REQUIRES: arm-registered-target |
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| 5 | |
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| 6 | // Test ARM v8.2-A dot product intrinsics |
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| 7 | |
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| 8 | #include <arm_neon.h> |
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| 9 | |
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| 10 | uint32x2_t test_vdot_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) { |
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| 11 | // CHECK-LABEL: define <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) |
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| 12 | // CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.arm.neon.udot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) |
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| 13 | // CHECK: ret <2 x i32> [[RESULT]] |
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| 14 | return vdot_u32(a, b, c); |
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| 15 | } |
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| 16 | |
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| 17 | uint32x4_t test_vdotq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) { |
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| 18 | // CHECK-LABEL: define <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) |
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| 19 | // CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.arm.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) |
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| 20 | // CHECK: ret <4 x i32> [[RESULT]] |
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| 21 | return vdotq_u32(a, b, c); |
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| 22 | } |
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| 23 | |
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| 24 | int32x2_t test_vdot_s32(int32x2_t a, int8x8_t b, int8x8_t c) { |
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| 25 | // CHECK-LABEL: define <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) |
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| 26 | // CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.arm.neon.sdot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) |
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| 27 | // CHECK: ret <2 x i32> [[RESULT]] |
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| 28 | return vdot_s32(a, b, c); |
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| 29 | } |
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| 30 | |
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| 31 | int32x4_t test_vdotq_s32(int32x4_t a, int8x16_t b, int8x16_t c) { |
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| 32 | // CHECK-LABEL: define <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) |
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| 33 | // CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.arm.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) |
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| 34 | // CHECK: ret <4 x i32> [[RESULT]] |
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| 35 | return vdotq_s32(a, b, c); |
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| 36 | } |
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| 37 | |
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| 38 | uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) { |
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| 39 | // CHECK-LABEL: define <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) |
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| 40 | // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> |
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| 41 | // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> <i32 1, i32 1> |
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| 42 | // CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8> |
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| 43 | // CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.arm.neon.udot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> [[CAST2]]) |
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| 44 | // CHECK: ret <2 x i32> [[RESULT]] |
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| 45 | return vdot_lane_u32(a, b, c, 1); |
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| 46 | } |
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| 47 | |
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| 48 | uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) { |
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| 49 | // CHECK-LABEL: define <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c) |
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| 50 | // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> |
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| 51 | // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> |
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| 52 | // CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8> |
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| 53 | // CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.arm.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> [[CAST2]]) |
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| 54 | // CHECK: ret <4 x i32> [[RESULT]] |
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| 55 | return vdotq_lane_u32(a, b, c, 1); |
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| 56 | } |
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| 57 | |
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| 58 | int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) { |
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| 59 | // CHECK-LABEL: define <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) |
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| 60 | // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> |
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| 61 | // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> <i32 1, i32 1> |
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| 62 | // CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8> |
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| 63 | // CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.arm.neon.sdot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> [[CAST2]]) |
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| 64 | // CHECK: ret <2 x i32> [[RESULT]] |
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| 65 | return vdot_lane_s32(a, b, c, 1); |
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| 66 | } |
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| 67 | |
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| 68 | int32x4_t test_vdotq_lane_s32(int32x4_t a, int8x16_t b, int8x8_t c) { |
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| 69 | // CHECK-LABEL: define <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c) |
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| 70 | // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> |
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| 71 | // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> |
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| 72 | // CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8> |
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| 73 | // CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.arm.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> [[CAST2]]) |
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| 74 | // CHECK: ret <4 x i32> [[RESULT]] |
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| 75 | return vdotq_lane_s32(a, b, c, 1); |
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| 76 | } |
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| 77 | |
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