| 1 | // REQUIRES: arm-registered-target |
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| 2 | // RUN: %clang_cc1 -triple thumbv7-apple-darwin \ |
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| 3 | // RUN: -target-abi apcs-gnu \ |
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| 4 | // RUN: -target-cpu cortex-a8 \ |
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| 5 | // RUN: -mfloat-abi soft \ |
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| 6 | // RUN: -target-feature +soft-float-abi \ |
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| 7 | // RUN: -ffreestanding \ |
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| 8 | // RUN: -emit-llvm -w -o - %s | FileCheck %s |
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| 9 | |
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| 10 | #include <arm_neon.h> |
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| 11 | |
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| 12 | // Radar 9311427: Check that alignment specifier is used in Neon load/store |
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| 13 | // intrinsics. |
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| 14 | typedef float AlignedAddr __attribute__ ((aligned (16))); |
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| 15 | void t1(AlignedAddr *addr1, AlignedAddr *addr2) { |
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| 16 | // CHECK: @t1 |
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| 17 | // CHECK: call <4 x float> @llvm.arm.neon.vld1.v4f32.p0i8(i8* %{{.*}}, i32 16) |
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| 18 | float32x4_t a = vld1q_f32(addr1); |
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| 19 | // CHECK: call void @llvm.arm.neon.vst1.p0i8.v4f32(i8* %{{.*}}, <4 x float> %{{.*}}, i32 16) |
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| 20 | vst1q_f32(addr2, a); |
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| 21 | } |
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| 22 | |
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| 23 | // Radar 10538555: Make sure unaligned load/stores do not gain alignment. |
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| 24 | void t2(char *addr) { |
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| 25 | // CHECK: @t2 |
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| 26 | // CHECK: load i32, i32* %{{.*}}, align 1 |
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| 27 | int32x2_t vec = vld1_dup_s32(addr); |
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| 28 | // CHECK: store i32 %{{.*}}, i32* {{.*}}, align 1 |
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| 29 | vst1_lane_s32(addr, vec, 1); |
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| 30 | } |
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| 31 | |
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