| 1 | // RUN: %clang_cc1 %s -emit-llvm -o - -triple=i686-apple-darwin9 | FileCheck %s |
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| 2 | |
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| 3 | int atomic(void) { |
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| 4 | // non-sensical test for sync functions |
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| 5 | int old; |
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| 6 | int val = 1; |
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| 7 | char valc = 1; |
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| 8 | _Bool valb = 0; |
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| 9 | unsigned int uval = 1; |
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| 10 | int cmp = 0; |
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| 11 | int* ptrval; |
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| 12 | |
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| 13 | old = __sync_fetch_and_add(&val, 1); |
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| 14 | // CHECK: atomicrmw add i32* %val, i32 1 seq_cst |
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| 15 | |
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| 16 | old = __sync_fetch_and_sub(&valc, 2); |
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| 17 | // CHECK: atomicrmw sub i8* %valc, i8 2 seq_cst |
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| 18 | |
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| 19 | old = __sync_fetch_and_min(&val, 3); |
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| 20 | // CHECK: atomicrmw min i32* %val, i32 3 seq_cst |
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| 21 | |
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| 22 | old = __sync_fetch_and_max(&val, 4); |
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| 23 | // CHECK: atomicrmw max i32* %val, i32 4 seq_cst |
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| 24 | |
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| 25 | old = __sync_fetch_and_umin(&uval, 5u); |
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| 26 | // CHECK: atomicrmw umin i32* %uval, i32 5 seq_cst |
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| 27 | |
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| 28 | old = __sync_fetch_and_umax(&uval, 6u); |
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| 29 | // CHECK: atomicrmw umax i32* %uval, i32 6 seq_cst |
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| 30 | |
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| 31 | old = __sync_lock_test_and_set(&val, 7); |
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| 32 | // CHECK: atomicrmw xchg i32* %val, i32 7 seq_cst |
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| 33 | |
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| 34 | old = __sync_swap(&val, 8); |
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| 35 | // CHECK: atomicrmw xchg i32* %val, i32 8 seq_cst |
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| 36 | |
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| 37 | old = __sync_val_compare_and_swap(&val, 4, 1976); |
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| 38 | // CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg i32* %val, i32 4, i32 1976 seq_cst |
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| 39 | // CHECK: extractvalue { i32, i1 } [[PAIR]], 0 |
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| 40 | |
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| 41 | old = __sync_bool_compare_and_swap(&val, 4, 1976); |
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| 42 | // CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg i32* %val, i32 4, i32 1976 seq_cst |
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| 43 | // CHECK: extractvalue { i32, i1 } [[PAIR]], 1 |
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| 44 | |
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| 45 | old = __sync_fetch_and_and(&val, 0x9); |
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| 46 | // CHECK: atomicrmw and i32* %val, i32 9 seq_cst |
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| 47 | |
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| 48 | old = __sync_fetch_and_or(&val, 0xa); |
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| 49 | // CHECK: atomicrmw or i32* %val, i32 10 seq_cst |
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| 50 | |
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| 51 | old = __sync_fetch_and_xor(&val, 0xb); |
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| 52 | // CHECK: atomicrmw xor i32* %val, i32 11 seq_cst |
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| 53 | |
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| 54 | old = __sync_fetch_and_nand(&val, 0xc); |
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| 55 | // CHECK: atomicrmw nand i32* %val, i32 12 seq_cst |
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| 56 | |
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| 57 | old = __sync_add_and_fetch(&val, 1); |
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| 58 | // CHECK: atomicrmw add i32* %val, i32 1 seq_cst |
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| 59 | |
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| 60 | old = __sync_sub_and_fetch(&val, 2); |
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| 61 | // CHECK: atomicrmw sub i32* %val, i32 2 seq_cst |
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| 62 | |
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| 63 | old = __sync_and_and_fetch(&valc, 3); |
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| 64 | // CHECK: atomicrmw and i8* %valc, i8 3 seq_cst |
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| 65 | |
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| 66 | old = __sync_or_and_fetch(&valc, 4); |
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| 67 | // CHECK: atomicrmw or i8* %valc, i8 4 seq_cst |
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| 68 | |
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| 69 | old = __sync_xor_and_fetch(&valc, 5); |
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| 70 | // CHECK: atomicrmw xor i8* %valc, i8 5 seq_cst |
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| 71 | |
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| 72 | old = __sync_nand_and_fetch(&valc, 6); |
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| 73 | // CHECK: atomicrmw nand i8* %valc, i8 6 seq_cst |
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| 74 | |
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| 75 | __sync_val_compare_and_swap((void **)0, (void *)0, (void *)0); |
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| 76 | // CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg i32* null, i32 0, i32 0 seq_cst |
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| 77 | // CHECK: extractvalue { i32, i1 } [[PAIR]], 0 |
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| 78 | |
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| 79 | if ( __sync_val_compare_and_swap(&valb, 0, 1)) { |
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| 80 | // CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg i8* %valb, i8 0, i8 1 seq_cst |
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| 81 | // CHECK: [[VAL:%[a-z0-9_.]+]] = extractvalue { i8, i1 } [[PAIR]], 0 |
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| 82 | // CHECK: trunc i8 [[VAL]] to i1 |
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| 83 | old = 42; |
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| 84 | } |
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| 85 | |
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| 86 | __sync_bool_compare_and_swap((void **)0, (void *)0, (void *)0); |
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| 87 | // CHECK: cmpxchg i32* null, i32 0, i32 0 seq_cst |
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| 88 | |
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| 89 | __sync_lock_release(&val); |
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| 90 | // CHECK: store atomic i32 0, {{.*}} release, align 4 |
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| 91 | |
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| 92 | __sync_lock_release(&ptrval); |
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| 93 | // CHECK: store atomic i32 0, {{.*}} release, align 4 |
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| 94 | |
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| 95 | __sync_synchronize (); |
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| 96 | // CHECK: fence seq_cst |
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| 97 | |
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| 98 | return old; |
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| 99 | } |
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| 100 | |
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| 101 | // CHECK: @release_return |
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| 102 | void release_return(int *lock) { |
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| 103 | // Ensure this is actually returning void all the way through. |
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| 104 | return __sync_lock_release(lock); |
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| 105 | // CHECK: store atomic {{.*}} release, align 4 |
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| 106 | } |
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| 107 | |
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| 108 | |
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| 109 | // rdar://8461279 - Atomics with address spaces. |
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| 110 | // CHECK: @addrspace |
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| 111 | void addrspace(int __attribute__((address_space(256))) * P) { |
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| 112 | __sync_bool_compare_and_swap(P, 0, 1); |
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| 113 | // CHECK: cmpxchg i32 addrspace(256)*{{.*}}, i32 0, i32 1 seq_cst |
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| 114 | |
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| 115 | __sync_val_compare_and_swap(P, 0, 1); |
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| 116 | // CHECK: cmpxchg i32 addrspace(256)*{{.*}}, i32 0, i32 1 seq_cst |
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| 117 | |
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| 118 | __sync_xor_and_fetch(P, 123); |
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| 119 | // CHECK: atomicrmw xor i32 addrspace(256)*{{.*}}, i32 123 seq_cst |
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| 120 | } |
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| 121 | |
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