1 | // RUN: %clang_cc1 -triple sparc-unknown-unknown -emit-llvm %s -o - | FileCheck %s |
2 | |
3 | // CHECK: define float @fabsf(float %a) |
4 | // CHECK: %{{.*}} = call float asm sideeffect "fabss $1, $0;", "=e,f"(float %{{.*}}) |
5 | float fabsf(float a) { |
6 | float res; |
7 | __asm __volatile__("fabss %1, %0;" |
8 | : /* reg out*/ "=e"(res) |
9 | : /* reg in */ "f"(a)); |
10 | return res; |
11 | } |
12 | |
13 | void test_gcc_registers(void) { |
14 | register unsigned int regO6 asm("o6") = 0; |
15 | register unsigned int regSP asm("sp") = 1; |
16 | register unsigned int reg14 asm("r14") = 2; |
17 | register unsigned int regI6 asm("i6") = 3; |
18 | register unsigned int regFP asm("fp") = 4; |
19 | register unsigned int reg30 asm("r30") = 5; |
20 | |
21 | register float fF20 asm("f20") = 8.0; |
22 | register double dF20 asm("f20") = 11.0; |
23 | register long double qF20 asm("f20") = 14.0; |
24 | |
25 | // Test remapping register names in register ... asm("rN") statments. |
26 | |
27 | // CHECK: call void asm sideeffect "add $0,$1,$2", "{r14},{r14},{r14}" |
28 | asm volatile("add %0,%1,%2" : : "r" (regO6), "r" (regSP), "r" (reg14)); |
29 | |
30 | // CHECK: call void asm sideeffect "add $0,$1,$2", "{r30},{r30},{r30}" |
31 | asm volatile("add %0,%1,%2" : : "r" (regI6), "r" (regFP), "r" (reg30)); |
32 | |
33 | // CHECK: call void asm sideeffect "fadds $0,$1,$2", "{f20},{f20},{f20}" |
34 | asm volatile("fadds %0,%1,%2" : : "f" (fF20), "f" (fF20), "f"(fF20)); |
35 | |
36 | // CHECK: call void asm sideeffect "faddd $0,$1,$2", "{f20},{f20},{f20}" |
37 | asm volatile("faddd %0,%1,%2" : : "f" (dF20), "f" (dF20), "f"(dF20)); |
38 | |
39 | // CHECK: call void asm sideeffect "faddq $0,$1,$2", "{f20},{f20},{f20}" |
40 | asm volatile("faddq %0,%1,%2" : : "f" (qF20), "f" (qF20), "f"(qF20)); |
41 | |
42 | } |
43 | |