1 | // RUN: %clang_cc1 -x c++ %s -O0 -triple=x86_64-apple-darwin -target-feature +avx2 -fmax-type-align=16 -emit-llvm -o - -Werror | FileCheck %s |
2 | // rdar://16254558 |
3 | |
4 | typedef float AVX2Float __attribute__((__vector_size__(32))); |
5 | |
6 | |
7 | volatile float TestAlign(void) |
8 | { |
9 | volatile AVX2Float *p = new AVX2Float; |
10 | *p = *p; |
11 | AVX2Float r = *p; |
12 | return r[0]; |
13 | } |
14 | |
15 | // CHECK: [[R:%.*]] = alloca <8 x float>, align 32 |
16 | // CHECK-NEXT: [[CALL:%.*]] = call i8* @_Znwm(i64 32) |
17 | // CHECK-NEXT: [[ZERO:%.*]] = bitcast i8* [[CALL]] to <8 x float>* |
18 | // CHECK-NEXT: store <8 x float>* [[ZERO]], <8 x float>** [[P:%.*]], align 8 |
19 | // CHECK-NEXT: [[ONE:%.*]] = load <8 x float>*, <8 x float>** [[P]], align 8 |
20 | // CHECK-NEXT: [[TWO:%.*]] = load volatile <8 x float>, <8 x float>* [[ONE]], align 16 |
21 | // CHECK-NEXT: [[THREE:%.*]] = load <8 x float>*, <8 x float>** [[P]], align 8 |
22 | // CHECK-NEXT: store volatile <8 x float> [[TWO]], <8 x float>* [[THREE]], align 16 |
23 | // CHECK-NEXT: [[FOUR:%.*]] = load <8 x float>*, <8 x float>** [[P]], align 8 |
24 | // CHECK-NEXT: [[FIVE:%.*]] = load volatile <8 x float>, <8 x float>* [[FOUR]], align 16 |
25 | // CHECK-NEXT: store <8 x float> [[FIVE]], <8 x float>* [[R]], align 32 |
26 | // CHECK-NEXT: [[SIX:%.*]] = load <8 x float>, <8 x float>* [[R]], align 32 |
27 | // CHECK-NEXT: [[VECEXT:%.*]] = extractelement <8 x float> [[SIX]], i32 0 |
28 | // CHECK-NEXT: ret float [[VECEXT]] |
29 | |
30 | typedef float AVX2Float_Explicitly_aligned __attribute__((__vector_size__(32))) __attribute__((aligned (32))); |
31 | |
32 | typedef AVX2Float_Explicitly_aligned AVX2Float_indirect; |
33 | |
34 | typedef AVX2Float_indirect AVX2Float_use_existing_align; |
35 | |
36 | volatile float TestAlign2(void) |
37 | { |
38 | volatile AVX2Float_use_existing_align *p = new AVX2Float_use_existing_align; |
39 | *p = *p; |
40 | AVX2Float_use_existing_align r = *p; |
41 | return r[0]; |
42 | } |
43 | |
44 | // CHECK: [[R:%.*]] = alloca <8 x float>, align 32 |
45 | // CHECK-NEXT: [[CALL:%.*]] = call i8* @_Znwm(i64 32) |
46 | // CHECK-NEXT: [[ZERO:%.*]] = bitcast i8* [[CALL]] to <8 x float>* |
47 | // CHECK-NEXT: store <8 x float>* [[ZERO]], <8 x float>** [[P:%.*]], align 8 |
48 | // CHECK-NEXT: [[ONE:%.*]] = load <8 x float>*, <8 x float>** [[P]], align 8 |
49 | // CHECK-NEXT: [[TWO:%.*]] = load volatile <8 x float>, <8 x float>* [[ONE]], align 32 |
50 | // CHECK-NEXT: [[THREE:%.*]] = load <8 x float>*, <8 x float>** [[P]], align 8 |
51 | // CHECK-NEXT: store volatile <8 x float> [[TWO]], <8 x float>* [[THREE]], align 32 |
52 | // CHECK-NEXT: [[FOUR:%.*]] = load <8 x float>*, <8 x float>** [[P]], align 8 |
53 | // CHECK-NEXT: [[FIVE:%.*]] = load volatile <8 x float>, <8 x float>* [[FOUR]], align 32 |
54 | // CHECK-NEXT: store <8 x float> [[FIVE]], <8 x float>* [[R]], align 32 |
55 | // CHECK-NEXT: [[SIX:%.*]] = load <8 x float>, <8 x float>* [[R]], align 32 |
56 | // CHECK-NEXT: [[VECEXT:%.*]] = extractelement <8 x float> [[SIX]], i32 0 |
57 | // CHECK-NEXT: ret float [[VECEXT]] |
58 | |