1 | // Test target codegen - host bc file has to be created first. |
2 | // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc |
3 | // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 |
4 | // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc |
5 | // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 |
6 | // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 |
7 | // expected-no-diagnostics |
8 | #ifndef HEADER |
9 | #define HEADER |
10 | |
11 | // Check that the execution mode of all 2 target regions on the gpu is set to NonSPMD Mode. |
12 | // CHECK-DAG: {{@__omp_offloading_.+l25}}_exec_mode = weak constant i8 1 |
13 | // CHECK-DAG: {{@__omp_offloading_.+l30}}_exec_mode = weak constant i8 1 |
14 | // CHECK-DAG: {{@__omp_offloading_.+l35}}_exec_mode = weak constant i8 1 |
15 | // CHECK-DAG: {{@__omp_offloading_.+l40}}_exec_mode = weak constant i8 1 |
16 | |
17 | #define N 1000 |
18 | |
19 | template<typename tx> |
20 | tx ftemplate(int n) { |
21 | tx a[N]; |
22 | short aa[N]; |
23 | tx b[10]; |
24 | |
25 | #pragma omp target simd |
26 | for(int i = 0; i < n; i++) { |
27 | a[i] = 1; |
28 | } |
29 | |
30 | #pragma omp target simd |
31 | for (int i = 0; i < n; i++) { |
32 | aa[i] += 1; |
33 | } |
34 | |
35 | #pragma omp target simd |
36 | for(int i = 0; i < 10; i++) { |
37 | b[i] += 1; |
38 | } |
39 | |
40 | #pragma omp target simd reduction(+:n) |
41 | for(int i = 0; i < 10; i++) { |
42 | b[i] += 1; |
43 | } |
44 | |
45 | return a[0]; |
46 | } |
47 | |
48 | int bar(int n){ |
49 | int a = 0; |
50 | |
51 | a += ftemplate<int>(n); |
52 | |
53 | return a; |
54 | } |
55 | |
56 | // CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+l25}}( |
57 | // CHECK: call void @__kmpc_kernel_init(i32 %{{.+}}, i16 1) |
58 | // CHECK-NOT: call void @__kmpc_for_static_init |
59 | // CHECK-NOT: call void @__kmpc_for_static_fini |
60 | // CHECK: call void @__kmpc_kernel_deinit(i16 1) |
61 | // CHECK: ret void |
62 | |
63 | // CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+l30}}( |
64 | // CHECK: call void @__kmpc_kernel_init(i32 %{{.+}}, i16 1) |
65 | // CHECK-NOT: call void @__kmpc_for_static_init |
66 | // CHECK-NOT: call void @__kmpc_for_static_fini |
67 | // CHECK: call void @__kmpc_kernel_deinit(i16 1) |
68 | // CHECK: ret void |
69 | |
70 | // CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+l35}}( |
71 | // CHECK: call void @__kmpc_kernel_init(i32 %{{.+}}, i16 1) |
72 | // CHECK-NOT: call void @__kmpc_for_static_init |
73 | // CHECK-NOT: call void @__kmpc_for_static_fini |
74 | // CHECK: call void @__kmpc_kernel_deinit(i16 1) |
75 | // CHECK: ret void |
76 | |
77 | // CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+l40}}( |
78 | // CHECK: call void @__kmpc_kernel_init(i32 %{{.+}}, i16 1) |
79 | // CHECK-NOT: call void @__kmpc_for_static_init |
80 | // CHECK-NOT: call void @__kmpc_for_static_fini |
81 | // CHECK-NOT: call i32 @__kmpc_nvptx_simd_reduce_nowait( |
82 | // CHECK-NOT: call void @__kmpc_nvptx_end_reduce_nowait( |
83 | // CHECK: call void @__kmpc_kernel_deinit(i16 1) |
84 | // CHECK: ret void |
85 | |
86 | |
87 | #endif |
88 | |