| 1 | // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 --check-prefix HCHECK --check-prefix HCHECK-64 |
| 2 | // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s |
| 3 | // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 --check-prefix HCHECK --check-prefix HCHECK-64 |
| 4 | // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 --check-prefix HCHECK --check-prefix HCHECK-32 |
| 5 | // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s |
| 6 | // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 --check-prefix HCHECK --check-prefix HCHECK-32 |
| 7 | |
| 8 | // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 --check-prefix HLAMBDA --check-prefix HLAMBDA-64 |
| 9 | // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s |
| 10 | // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 --check-prefix HLAMBDA --check-prefix HLAMBDA-64 |
| 11 | |
| 12 | // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix SIMD-ONLY |
| 13 | // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s |
| 14 | // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix SIMD-ONLY |
| 15 | // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix SIMD-ONLY |
| 16 | // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s |
| 17 | // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix SIMD-ONLY |
| 18 | |
| 19 | // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix SIMD-ONLY |
| 20 | // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s |
| 21 | // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix SIMD-ONLY |
| 22 | |
| 23 | // Test target codegen - host bc file has to be created first. (no significant differences with host version of target region) |
| 24 | // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc |
| 25 | // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 --check-prefix TCHECK --check-prefix TCHECK-64 |
| 26 | // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s |
| 27 | // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 --check-prefix TCHECK --check-prefix TCHECK-64 |
| 28 | // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc |
| 29 | // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 --check-prefix TCHECK --check-prefix TCHECK-32 |
| 30 | // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s |
| 31 | // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 --check-prefix TCHECK --check-prefix TCHECK-32 |
| 32 | |
| 33 | // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc |
| 34 | // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 --check-prefix TLAMBDA --check-prefix TLAMBDA-64 |
| 35 | |
| 36 | // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc |
| 37 | // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix SIMD-ONLY |
| 38 | // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s |
| 39 | // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix SIMD-ONLY |
| 40 | // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc |
| 41 | // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix SIMD-ONLY |
| 42 | // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s |
| 43 | // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix SIMD-ONLY |
| 44 | |
| 45 | // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc |
| 46 | // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix SIMD-ONLY |
| 47 | // SIMD-ONLY-NOT: {{__kmpc|__tgt}} |
| 48 | |
| 49 | // expected-no-diagnostics |
| 50 | #ifndef HEADER |
| 51 | #define HEADER |
| 52 | |
| 53 | struct St { |
| 54 | int a, b; |
| 55 | St() : a(0), b(0) {} |
| 56 | St(const St &st) : a(st.a + st.b), b(0) {} |
| 57 | ~St() {} |
| 58 | }; |
| 59 | |
| 60 | volatile int g = 1212; |
| 61 | volatile int &g1 = g; |
| 62 | |
| 63 | template <class T> |
| 64 | struct S { |
| 65 | T f; |
| 66 | S(T a) : f(a + g) {} |
| 67 | S() : f(g) {} |
| 68 | S(const S &s, St t = St()) : f(s.f + t.a) {} |
| 69 | operator T() { return T(); } |
| 70 | ~S() {} |
| 71 | }; |
| 72 | |
| 73 | // CHECK-DAG: [[S_FLOAT_TY:%.+]] = type { float } |
| 74 | // CHECK-DAG: [[S_INT_TY:%.+]] = type { i{{[0-9]+}} } |
| 75 | // CHECK-DAG: [[ST_TY:%.+]] = type { i{{[0-9]+}}, i{{[0-9]+}} } |
| 76 | |
| 77 | template <typename T> |
| 78 | T tmain() { |
| 79 | S<T> test; |
| 80 | T t_var = T(); |
| 81 | T vec[] = {1, 2}; |
| 82 | S<T> s_arr[] = {1, 2}; |
| 83 | S<T> &var = test; |
| 84 | #pragma omp target teams distribute parallel for firstprivate(t_var, vec, s_arr, var) |
| 85 | for (int i = 0; i < 2; ++i) { |
| 86 | vec[i] = t_var; |
| 87 | s_arr[i] = var; |
| 88 | } |
| 89 | return T(); |
| 90 | } |
| 91 | |
| 92 | // HCHECK-DAG: [[TEST:@.+]] = global [[S_FLOAT_TY]] zeroinitializer, |
| 93 | S<float> test; |
| 94 | // HCHECK-DAG: [[T_VAR:@.+]] = global i{{[0-9]+}} 333, |
| 95 | int t_var = 333; |
| 96 | // HCHECK-DAG: [[VEC:@.+]] = global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2], |
| 97 | int vec[] = {1, 2}; |
| 98 | // HCHECK-DAG: [[S_ARR:@.+]] = global [2 x [[S_FLOAT_TY]]] zeroinitializer, |
| 99 | S<float> s_arr[] = {1, 2}; |
| 100 | // HCHECK-DAG: [[VAR:@.+]] = global [[S_FLOAT_TY]] zeroinitializer, |
| 101 | S<float> var(3); |
| 102 | // HCHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0, |
| 103 | |
| 104 | int main() { |
| 105 | static int sivar; |
| 106 | #ifdef LAMBDA |
| 107 | // HLAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212, |
| 108 | // HLAMBDA-LABEL: @main |
| 109 | // HLAMBDA: call void [[OUTER_LAMBDA:@.+]]( |
| 110 | [&]() { |
| 111 | // HLAMBDA: define{{.*}} internal{{.*}} void [[OUTER_LAMBDA]]( |
| 112 | // HLAMBDA: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) |
| 113 | // HLAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} %{{.+}}) |
| 114 | // HLAMBDA: ret |
| 115 | #pragma omp target teams distribute parallel for firstprivate(g, g1, sivar) |
| 116 | for (int i = 0; i < 2; ++i) { |
| 117 | // HLAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}}) |
| 118 | // TLAMBDA: define weak void @[[LOFFL1:.+]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}}) |
| 119 | // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, |
| 120 | // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, |
| 121 | // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, |
| 122 | // LAMBDA: [[G_CAST:%.+]] = alloca i{{[0-9]+}}, |
| 123 | // LAMBDA: [[G1_CAST:%.+]] = alloca i{{[0-9]+}}, |
| 124 | // LAMBDA: [[SIVAR_CAST:%.+]] = alloca i{{[0-9]+}}, |
| 125 | // LAMBDA-DAG: [[G_CAST_VAL:%.+]] = load{{.+}} [[G_CAST]], |
| 126 | // LAMBDA-DAG: [[G1_CAST_VAL:%.+]] = load{{.+}} [[G1_CAST]], |
| 127 | // LAMBDA-DAG: [[SIVAR_CAST_VAL:%.+]] = load{{.+}} [[SIVAR_CAST]], |
| 128 | // LAMBDA: call void {{.+}} @__kmpc_fork_teams({{.+}}, i32 3, {{.+}} @[[LOUTL1:.+]] to {{.+}}, {{.+}} [[G_CAST_VAL]], {{.+}} [[G1_CAST_VAL]], {{.+}} [[SIVAR_CAST_VAL]]) |
| 129 | // LAMBDA: ret void |
| 130 | |
| 131 | // LAMBDA: define internal void @[[LOUTL1]]({{.+}}) |
| 132 | // Skip global and bound tid vars |
| 133 | // LAMBDA: {{.+}} = alloca i32*, |
| 134 | // LAMBDA: {{.+}} = alloca i32*, |
| 135 | // LAMBDA: [[G_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 136 | // LAMBDA: [[G1_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 137 | // LAMBDA: [[SIVAR_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 138 | // LAMBDA: [[G1_TMP:%.+]] = alloca i32*, |
| 139 | // skip loop vars |
| 140 | // LAMBDA-DAG: store {{.+}}, {{.+}} [[G_ADDR]], |
| 141 | // LAMBDA-DAG: store {{.+}}, {{.+}} [[G1_ADDR]], |
| 142 | // LAMBDA-DAG: store {{.+}}, {{.+}} [[SIVAR_ADDR]], |
| 143 | // LAMBDA-DAG: [[G_CONV:%.+]] = bitcast {{.+}} [[G_ADDR]] to |
| 144 | // LAMBDA-DAG: [[G1_CONV:%.+]] = bitcast {{.+}} [[G1_ADDR]] to |
| 145 | // LAMBDA-DAG: [[SIVAR_CONV:%.+]] = bitcast {{.+}} [[SIVAR_ADDR]] to |
| 146 | // LAMBDA-DAG: store{{.+}} [[G1_CONV]], {{.+}} [[G1_TMP]], |
| 147 | g = 1; |
| 148 | g1 = 1; |
| 149 | sivar = 2; |
| 150 | // LAMBDA: call void @__kmpc_for_static_init_4( |
| 151 | // LAMBDA: call void {{.*}} @__kmpc_fork_call({{.+}}, {{.+}}, {{.+}} @[[LPAR_OUTL:.+]] to |
| 152 | // LAMBDA: call void @__kmpc_for_static_fini( |
| 153 | // LAMBDA: ret void |
| 154 | |
| 155 | // LAMBDA: define internal void @[[LPAR_OUTL]]({{.+}}) |
| 156 | // Skip global and bound tid vars, and prev lb and ub vars |
| 157 | // LAMBDA: {{.+}} = alloca i32*, |
| 158 | // LAMBDA: {{.+}} = alloca i32*, |
| 159 | // LAMBDA: {{.+}} = alloca i{{[0-9]+}}, |
| 160 | // LAMBDA: {{.+}} = alloca i{{[0-9]+}}, |
| 161 | // LAMBDA: [[G_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 162 | // LAMBDA: [[G1_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 163 | // LAMBDA: [[SIVAR_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 164 | // LAMBDA: [[G1_TMP:%.+]] = alloca i32*, |
| 165 | // skip loop vars |
| 166 | // LAMBDA-DAG: store {{.+}}, {{.+}} [[G_ADDR]], |
| 167 | // LAMBDA-DAG: store {{.+}}, {{.+}} [[G1_ADDR]], |
| 168 | // LAMBDA-DAG: store {{.+}}, {{.+}} [[SIVAR_ADDR]], |
| 169 | // LAMBDA-DAG: [[G_CONV:%.+]] = bitcast {{.+}} [[G_ADDR]] to |
| 170 | // LAMBDA-DAG: [[G1_CONV:%.+]] = bitcast {{.+}} [[G1_ADDR]] to |
| 171 | // LAMBDA-DAG: [[SIVAR_CONV:%.+]] = bitcast {{.+}} [[SIVAR_ADDR]] to |
| 172 | // LAMBDA-DAG: store{{.+}} [[G1_CONV]], {{.+}} [[G1_TMP]], |
| 173 | |
| 174 | // use of private vars |
| 175 | // LAMBDA-DAG: store{{.+}} 1, {{.+}} [[G_CONV]], |
| 176 | // LAMBDA-DAG: [[G1:%.+]] = load{{.+}}, {{.+}}* [[G1_TMP]] |
| 177 | // LAMBDA-DAG: store{{.+}} 1, {{.+}} [[G1]], |
| 178 | // LAMBDA-DAG: store{{.+}} 2, {{.+}} [[SIVAR_CONV]], |
| 179 | // LAMBDA-DAG: [[G1_REF:%.+]] = load{{.+}}, {{.+}} [[G1_TMP]], |
| 180 | // LAMBDA: call void [[INNER_LAMBDA:@.+]]( |
| 181 | // LAMBDA: call void @__kmpc_for_static_fini( |
| 182 | // LAMBDA: ret void |
| 183 | [&]() { |
| 184 | // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) |
| 185 | // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], |
| 186 | g = 2; |
| 187 | g1 = 2; |
| 188 | sivar = 4; |
| 189 | // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] |
| 190 | |
| 191 | // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 |
| 192 | // LAMBDA: [[G_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[G_PTR_REF]] |
| 193 | // LAMBDA: store i{{[0-9]+}} 2, i{{[0-9]+}}* [[G_REF]] |
| 194 | // LAMBDA: [[G1_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 |
| 195 | // LAMBDA: [[G1_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[G1_PTR_REF]] |
| 196 | // LAMBDA: store i{{[0-9]+}} 2, i{{[0-9]+}}* [[G1_REF]] |
| 197 | // LAMBDA: [[SIVAR_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 |
| 198 | // LAMBDA: [[SIVAR_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[SIVAR_PTR_REF]] |
| 199 | // LAMBDA: store i{{[0-9]+}} 4, i{{[0-9]+}}* [[SIVAR_REF]] |
| 200 | }(); |
| 201 | } |
| 202 | }(); |
| 203 | return 0; |
| 204 | #else |
| 205 | #pragma omp target teams distribute parallel for firstprivate(t_var, vec, s_arr, var, sivar) |
| 206 | for (int i = 0; i < 2; ++i) { |
| 207 | vec[i] = t_var; |
| 208 | s_arr[i] = var; |
| 209 | sivar += i; |
| 210 | } |
| 211 | return tmain<int>(); |
| 212 | #endif |
| 213 | } |
| 214 | |
| 215 | // HCHECK: define {{.*}}i{{[0-9]+}} @main() |
| 216 | // HCHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 5, |
| 217 | // HCHECK: call void @[[OFFL1:.+]]( |
| 218 | // HCHECK: {{%.+}} = call{{.*}} i32 @[[TMAIN_INT:.+]]() |
| 219 | // HCHECK: ret |
| 220 | |
| 221 | // HCHECK: define{{.*}} void @[[OFFL1]]( |
| 222 | // TCHECK: define{{.*}} void @[[OFFL1:.+]]( |
| 223 | // CHECK-DAG: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, |
| 224 | // CHECK-DAG: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}]*, |
| 225 | // CHECK-DAG: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]]*, |
| 226 | // CHECK-DAG: [[VAR_PRIV:%.+]] = alloca [[S_FLOAT_TY]]*, |
| 227 | // CHECK: [[SIVAR_PRIV:%.+]] = alloca i{{[0-9]+}}, |
| 228 | // CHECK: [[T_VAR_CAST:%.+]] = alloca i{{[0-9]+}}, |
| 229 | // CHECK: [[SIVAR_CAST:%.+]] = alloca i{{[0-9]+}}, |
| 230 | |
| 231 | // CHECK-DAG: [[VEC_TE_PAR:%.+]] = load [2 x i{{[0-9]+}}]*, [2 x i{{[0-9]+}}]** [[VEC_PRIV]], |
| 232 | // CHECK-DAG: [[T_VAR_TE_PAR:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[T_VAR_CAST]], |
| 233 | // CHECK-DAG: [[S_ARR_TE_PAR:%.+]] = load [2 x [[S_FLOAT_TY]]]*, [2 x [[S_FLOAT_TY]]]** [[S_ARR_PRIV]], |
| 234 | // CHECK-DAG: [[VAR_TE_PAR:%.+]] = load [[S_FLOAT_TY]]*, [[S_FLOAT_TY]]** [[VAR_PRIV]], |
| 235 | // CHECK-DAG: [[SIVAR_TE_PAR:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[SIVAR_CAST]], |
| 236 | |
| 237 | // CHECK: call void {{.+}} @__kmpc_fork_teams({{.+}}, i32 5, {{.+}} @[[OUTL1:.+]] to {{.+}}, [2 x i{{[0-9]+}}]* [[VEC_TE_PAR]], i{{[0-9]+}} [[T_VAR_TE_PAR]], [2 x [[S_FLOAT_TY]]]* [[S_ARR_TE_PAR]], [[S_FLOAT_TY]]* [[VAR_TE_PAR]], i{{[0-9]+}} [[SIVAR_TE_PAR]]) |
| 238 | // CHECK: ret void |
| 239 | |
| 240 | // CHECK: define internal void @[[OUTL1]]({{.+}}) |
| 241 | // Skip global and bound tid vars |
| 242 | // CHECK: {{.+}} = alloca i32*, |
| 243 | // CHECK: {{.+}} = alloca i32*, |
| 244 | // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, |
| 245 | // CHECK: [[T_VAR_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 246 | // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_FLOAT_TY]]]*, |
| 247 | // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_FLOAT_TY]]*, |
| 248 | // CHECK: [[SIVAR_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 249 | // Skip temp vars for loop |
| 250 | // CHECK: alloca i{{[0-9]+}}, |
| 251 | // CHECK: alloca i{{[0-9]+}}, |
| 252 | // CHECK: alloca i{{[0-9]+}}, |
| 253 | // CHECK: alloca i{{[0-9]+}}, |
| 254 | // CHECK: alloca i{{[0-9]+}}, |
| 255 | // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], |
| 256 | // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]], |
| 257 | // CHECK: [[AGG_TMP1:%.+]] = alloca [[ST_TY]], |
| 258 | // CHECK: [[VAR_PRIV:%.+]] = alloca [[S_FLOAT_TY]], |
| 259 | // CHECK: [[AGG_TMP2:%.+]] = alloca [[ST_TY]], |
| 260 | |
| 261 | // param copy |
| 262 | // CHECK: store [2 x i{{[0-9]+}}]* {{.+}}, [2 x i{{[0-9]+}}]** [[VEC_ADDR]], |
| 263 | // CHECK: store i{{[0-9]+}} {{.+}}, i{{[0-9]+}}* [[T_VAR_ADDR]], |
| 264 | // CHECK: store [2 x [[S_FLOAT_TY]]]* {{.+}}, [2 x [[S_FLOAT_TY]]]** [[S_ARR_ADDR]], |
| 265 | // CHECK: store [[S_FLOAT_TY]]* {{.+}}, [[S_FLOAT_TY]]** [[VAR_ADDR]], |
| 266 | // CHECK: store i{{[0-9]+}} {{.+}}, i{{[0-9]+}}* [[SIVAR_ADDR]], |
| 267 | |
| 268 | // T_VAR and SIVAR |
| 269 | // CHECK-64-DAG: [[CONV_TVAR:%.+]] = bitcast i64* [[T_VAR_ADDR]] to i32* |
| 270 | // CHECK-64-DAG: [[CONV_SIVAR:%.+]] = bitcast i64* [[SIVAR_ADDR]] to i32* |
| 271 | |
| 272 | // preparation vars |
| 273 | // CHECK-DAG: [[VEC_ADDR_VAL:%.+]] = load [2 x i{{[0-9]+}}]*, [2 x i{{[0-9]+}}]** [[VEC_ADDR]], |
| 274 | // CHECK-DAG: [[S_ARR_ADDR_REF:%.+]] = load [2 x [[S_FLOAT_TY]]]*, [2 x [[S_FLOAT_TY]]]** [[S_ARR_ADDR]], |
| 275 | // CHECK-DAG: [[VAR_ADDR_REF:%.+]] = load{{.+}} [[VAR_ADDR]], |
| 276 | |
| 277 | // firstprivate vec(vec): copy from *_addr into priv1 and then from priv1 into priv2 |
| 278 | // CHECK-DAG: [[VEC_DEST_PRIV:%.+]] = bitcast [2 x i{{[0-9]+}}]* [[VEC_PRIV]] to i8* |
| 279 | // CHECK-DAG: [[VEC_SRC:%.+]] = bitcast [2 x i{{[0-9]+}}]* [[VEC_ADDR_VAL]] to i8* |
| 280 | // CHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[VEC_DEST_PRIV]], i8* align {{[0-9]+}} [[VEC_SRC]], {{.+}}) |
| 281 | |
| 282 | // firstprivate(s_arr) |
| 283 | // CHECK-DAG: [[S_ARR_PRIV_BGN:%.+]] = getelementptr{{.*}} [2 x [[S_FLOAT_TY]]], [2 x [[S_FLOAT_TY]]]* [[S_ARR_PRIV]], |
| 284 | // CHECK-DAG: [[S_ARR_ADDR_BGN:%.+]] = bitcast [2 x [[S_FLOAT_TY]]]* [[S_ARR_ADDR_REF]] to |
| 285 | // CHECK-DAG: [[S_ARR_FIN:%.+]] = icmp{{.+}} [[S_ARR_PRIV_BGN]], |
| 286 | // CHECK-DAG: [[S_ARR_SRC_COPY:%.+]] = phi{{.+}} [ [[S_ARR_ADDR_BGN]], {{.+}} ], [ [[S_ARR_SRC:%.+]], {{.+}} ] |
| 287 | // CHECK-DAG: [[S_ARR_DST_COPY:%.+]] = phi{{.+}} [ [[S_ARR_PRIV_BGN]], {{.+}}], [ [[S_ARR_DST:%.+]], {{.+}} ] |
| 288 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP1]]) |
| 289 | // CHECK-DAG: call void @{{.+}}({{.+}} [[S_ARR_DST_COPY]], {{.+}} [[S_ARR_SRC_COPY]], {{.+}} [[AGG_TMP1]]) |
| 290 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP1]]) |
| 291 | // CHECK-DAG: [[S_ARR_DST]] = getelementptr {{.+}} [[S_ARR_DST_COPY]], |
| 292 | // CHECK-DAG: [[S_ARR_SRC]] = getelementptr {{.+}} [[S_ARR_SRC_COPY]], |
| 293 | |
| 294 | // firstprivate(var) |
| 295 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP2]]) |
| 296 | // CHECK-DAG: call void @{{.+}}({{.+}} [[VAR_PRIV]], {{.+}} [[VAR_ADDR_REF]], {{.+}} [[AGG_TMP2]]) |
| 297 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP2]]) |
| 298 | |
| 299 | // CHECK: call void @__kmpc_for_static_init_4( |
| 300 | // CHECK: call void {{.*}} @__kmpc_fork_call({{.+}}, {{.+}}, {{.+}} @[[PAR_OUTL:.+]] to |
| 301 | // CHECK: call void @__kmpc_for_static_fini( |
| 302 | // CHECK: ret void |
| 303 | |
| 304 | // CHECK: define internal void @[[PAR_OUTL]]({{.+}}) |
| 305 | // Skip global and bound tid vars, and prev lb ub vars |
| 306 | // CHECK: {{.+}} = alloca i32*, |
| 307 | // CHECK: {{.+}} = alloca i32*, |
| 308 | // CHECK: {{.+}} = alloca i{{[0-9]+}}, |
| 309 | // CHECK: {{.+}} = alloca i{{[0-9]+}}, |
| 310 | // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, |
| 311 | // CHECK: [[T_VAR_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 312 | // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_FLOAT_TY]]]*, |
| 313 | // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_FLOAT_TY]]*, |
| 314 | // CHECK: [[SIVAR_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 315 | // Skip temp vars for loop |
| 316 | // CHECK: alloca i{{[0-9]+}}, |
| 317 | // CHECK: alloca i{{[0-9]+}}, |
| 318 | // CHECK: alloca i{{[0-9]+}}, |
| 319 | // CHECK: alloca i{{[0-9]+}}, |
| 320 | // CHECK: alloca i{{[0-9]+}}, |
| 321 | // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], |
| 322 | // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]], |
| 323 | // CHECK: [[AGG_TMP1:%.+]] = alloca [[ST_TY]], |
| 324 | // CHECK: [[VAR_PRIV:%.+]] = alloca [[S_FLOAT_TY]], |
| 325 | // CHECK: [[AGG_TMP2:%.+]] = alloca [[ST_TY]], |
| 326 | |
| 327 | // param copy |
| 328 | // CHECK: store [2 x i{{[0-9]+}}]* {{.+}}, [2 x i{{[0-9]+}}]** [[VEC_ADDR]], |
| 329 | // CHECK: store i{{[0-9]+}} {{.+}}, i{{[0-9]+}}* [[T_VAR_ADDR]], |
| 330 | // CHECK: store [2 x [[S_FLOAT_TY]]]* {{.+}}, [2 x [[S_FLOAT_TY]]]** [[S_ARR_ADDR]], |
| 331 | // CHECK: store [[S_FLOAT_TY]]* {{.+}}, [[S_FLOAT_TY]]** [[VAR_ADDR]], |
| 332 | // CHECK: store i{{[0-9]+}} {{.+}}, i{{[0-9]+}}* [[SIVAR_ADDR]], |
| 333 | |
| 334 | // T_VAR and SIVAR |
| 335 | // CHECK-64-DAG: [[CONV_TVAR:%.+]] = bitcast i64* [[T_VAR_ADDR]] to i32* |
| 336 | // CHECK-64-DAG: [[CONV_SIVAR:%.+]] = bitcast i64* [[SIVAR_ADDR]] to i32* |
| 337 | |
| 338 | // preparation vars |
| 339 | // CHECK-DAG: [[VEC_ADDR_VAL:%.+]] = load [2 x i{{[0-9]+}}]*, [2 x i{{[0-9]+}}]** [[VEC_ADDR]], |
| 340 | // CHECK-DAG: [[S_ARR_ADDR_REF:%.+]] = load [2 x [[S_FLOAT_TY]]]*, [2 x [[S_FLOAT_TY]]]** [[S_ARR_ADDR]], |
| 341 | // CHECK-DAG: [[VAR_ADDR_REF:%.+]] = load{{.+}} [[VAR_ADDR]], |
| 342 | |
| 343 | // firstprivate vec(vec): copy from *_addr into priv1 and then from priv1 into priv2 |
| 344 | // CHECK-DAG: [[VEC_DEST_PRIV:%.+]] = bitcast [2 x i{{[0-9]+}}]* [[VEC_PRIV]] to i8* |
| 345 | // CHECK-DAG: [[VEC_SRC:%.+]] = bitcast [2 x i{{[0-9]+}}]* [[VEC_ADDR_VAL]] to i8* |
| 346 | // CHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[VEC_DEST_PRIV]], i8* align {{[0-9]+}} [[VEC_SRC]], {{.+}}) |
| 347 | |
| 348 | // firstprivate(s_arr) |
| 349 | // CHECK-DAG: [[S_ARR_PRIV_BGN:%.+]] = getelementptr{{.*}} [2 x [[S_FLOAT_TY]]], [2 x [[S_FLOAT_TY]]]* [[S_ARR_PRIV]], |
| 350 | // CHECK-DAG: [[S_ARR_ADDR_BGN:%.+]] = bitcast [2 x [[S_FLOAT_TY]]]* [[S_ARR_ADDR_REF]] to |
| 351 | // CHECK-DAG: [[S_ARR_FIN:%.+]] = icmp{{.+}} [[S_ARR_PRIV_BGN]], |
| 352 | // CHECK-DAG: [[S_ARR_SRC_COPY:%.+]] = phi{{.+}} [ [[S_ARR_ADDR_BGN]], {{.+}} ], [ [[S_ARR_SRC:%.+]], {{.+}} ] |
| 353 | // CHECK-DAG: [[S_ARR_DST_COPY:%.+]] = phi{{.+}} [ [[S_ARR_PRIV_BGN]], {{.+}}], [ [[S_ARR_DST:%.+]], {{.+}} ] |
| 354 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP1]]) |
| 355 | // CHECK-DAG: call void @{{.+}}({{.+}} [[S_ARR_DST_COPY]], {{.+}} [[S_ARR_SRC_COPY]], {{.+}} [[AGG_TMP1]]) |
| 356 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP1]]) |
| 357 | // CHECK-DAG: [[S_ARR_DST]] = getelementptr {{.+}} [[S_ARR_DST_COPY]], |
| 358 | // CHECK-DAG: [[S_ARR_SRC]] = getelementptr {{.+}} [[S_ARR_SRC_COPY]], |
| 359 | |
| 360 | // firstprivate(var) |
| 361 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP2]]) |
| 362 | // CHECK-DAG: call void @{{.+}}({{.+}} [[VAR_PRIV]], {{.+}} [[VAR_ADDR_REF]], {{.+}} [[AGG_TMP2]]) |
| 363 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP2]]) |
| 364 | |
| 365 | // CHECK: call void @__kmpc_for_static_init_4( |
| 366 | // CHECK-32-DAG: {{.+}} = {{.+}} [[T_VAR_ADDR]] |
| 367 | // CHECK-64-DAG: {{.+}} = {{.+}} [[CONV_TVAR]] |
| 368 | // CHECK-DAG: {{.+}} = {{.+}} [[VEC_PRIV]] |
| 369 | // CHECK-DAG: {{.+}} = {{.+}} [[S_ARR_PRIV]] |
| 370 | // CHECK-DAG: {{.+}} = {{.+}} [[VAR_PRIV]] |
| 371 | // CHECK-32-DAG: {{.+}} = {{.+}} [[SIVAR_ADDR]] |
| 372 | // CHECK-64-DAG: {{.+}} = {{.+}} [[CONV_SIVAR]] |
| 373 | // CHECK: call void @__kmpc_for_static_fini( |
| 374 | // CHECK: ret void |
| 375 | |
| 376 | // HCHECK: define{{.*}} i{{[0-9]+}} @[[TMAIN_INT]]() |
| 377 | // HCHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 4, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) |
| 378 | // HCHECK: call void @[[TOFFL1:.+]]( |
| 379 | // HCHECK: ret |
| 380 | |
| 381 | // HCHECK: define {{.*}}void @[[TOFFL1]]({{.+}}) |
| 382 | // TCHECK: define {{.*}}void @[[TOFFL1:.+]]({{.+}}) |
| 383 | // CHECK-DAG: [[TT_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, |
| 384 | // CHECK-DAG: [[TVEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}]*, |
| 385 | // CHECK-DAG: [[TS_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]]*, |
| 386 | // CHECK-DAG: [[TVAR_PRIV:%.+]] = alloca [[S_INT_TY]]*, |
| 387 | // CHECK: [[TT_VAR_CAST:%.+]] = alloca i{{[0-9]+}}, |
| 388 | |
| 389 | // CHECK-DAG: [[TVEC_TE_PAR:%.+]] = load [2 x i{{[0-9]+}}]*, [2 x i{{[0-9]+}}]** [[TVEC_PRIV]], |
| 390 | // CHECK-DAG: [[TT_VAR_TE_PAR:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[TT_VAR_CAST]], |
| 391 | // CHECK-DAG: [[TS_ARR_TE_PAR:%.+]] = load [2 x [[S_INT_TY]]]*, [2 x [[S_INT_TY]]]** [[TS_ARR_PRIV]], |
| 392 | // CHECK-DAG: [[TVAR_TE_PAR:%.+]] = load [[S_INT_TY]]*, [[S_INT_TY]]** [[TVAR_PRIV]], |
| 393 | |
| 394 | // CHECK: call void {{.+}} @__kmpc_fork_teams({{.+}}, i32 4, {{.+}} @[[TOUTL1:.+]] to {{.+}}, [2 x i{{[0-9]+}}]* [[TVEC_TE_PAR]], i{{[0-9]+}} [[TT_VAR_TE_PAR]], [2 x [[S_INT_TY]]]* [[TS_ARR_TE_PAR]], [[S_INT_TY]]* [[TVAR_TE_PAR]]) |
| 395 | // CHECK: ret void |
| 396 | |
| 397 | // CHECK: define internal void @[[TOUTL1]]({{.+}}) |
| 398 | // Skip global and bound tid vars |
| 399 | // CHECK: {{.+}} = alloca i32*, |
| 400 | // CHECK: {{.+}} = alloca i32*, |
| 401 | // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, |
| 402 | // CHECK: [[T_VAR_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 403 | // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_INT_TY]]]*, |
| 404 | // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]]*, |
| 405 | // Skip temp vars for loop |
| 406 | // CHECK: alloca i{{[0-9]+}}, |
| 407 | // CHECK: alloca i{{[0-9]+}}, |
| 408 | // CHECK: alloca i{{[0-9]+}}, |
| 409 | // CHECK: alloca i{{[0-9]+}}, |
| 410 | // CHECK: alloca i{{[0-9]+}}, |
| 411 | // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], |
| 412 | // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]], |
| 413 | // CHECK: [[AGG_TMP1:%.+]] = alloca [[ST_TY]], |
| 414 | // CHECK: [[VAR_PRIV:%.+]] = alloca [[S_INT_TY]], |
| 415 | // CHECK: [[AGG_TMP2:%.+]] = alloca [[ST_TY]], |
| 416 | // CHECK: [[TMP:%.+]] = alloca [[S_INT_TY]]*, |
| 417 | |
| 418 | // param copy |
| 419 | // CHECK: store [2 x i{{[0-9]+}}]* {{.+}}, [2 x i{{[0-9]+}}]** [[VEC_ADDR]], |
| 420 | // CHECK: store i{{[0-9]+}} {{.+}}, i{{[0-9]+}}* [[T_VAR_ADDR]], |
| 421 | // CHECK: store [2 x [[S_INT_TY]]]* {{.+}}, [2 x [[S_INT_TY]]]** [[S_ARR_ADDR]], |
| 422 | // CHECK: store [[S_INT_TY]]* {{.+}}, [[S_INT_TY]]** [[VAR_ADDR]], |
| 423 | |
| 424 | // T_VAR and preparation variables |
| 425 | // CHECK: [[VEC_ADDR_VAL:%.+]] = load [2 x i{{[0-9]+}}]*, [2 x i{{[0-9]+}}]** [[VEC_ADDR]], |
| 426 | // CHECK-64: [[CONV_TVAR:%.+]] = bitcast i64* [[T_VAR_ADDR]] to i32* |
| 427 | // CHECK: [[S_ARR_ADDR_REF:%.+]] = load [2 x [[S_INT_TY]]]*, [2 x [[S_INT_TY]]]** [[S_ARR_ADDR]], |
| 428 | |
| 429 | // firstprivate vec(vec): copy from *_addr into priv1 and then from priv1 into priv2 |
| 430 | // CHECK-DAG: [[VEC_DEST_PRIV:%.+]] = bitcast [2 x i{{[0-9]+}}]* [[VEC_PRIV]] to i8* |
| 431 | // CHECK-DAG: [[VEC_SRC:%.+]] = bitcast [2 x i{{[0-9]+}}]* [[VEC_ADDR_VAL]] to i8* |
| 432 | // CHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[VEC_DEST_PRIV]], i8* align {{[0-9]+}} [[VEC_SRC]], {{.+}}) |
| 433 | |
| 434 | // firstprivate(s_arr) |
| 435 | // CHECK-DAG: [[S_ARR_PRIV_BGN:%.+]] = getelementptr{{.*}} [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[S_ARR_PRIV]], |
| 436 | // CHECK-DAG: [[S_ARR_ADDR_BGN:%.+]] = bitcast [2 x [[S_INT_TY]]]* [[S_ARR_ADDR_REF]] to |
| 437 | // CHECK-DAG: [[S_ARR_FIN:%.+]] = icmp{{.+}} [[S_ARR_PRIV_BGN]], |
| 438 | // CHECK-DAG: [[S_ARR_SRC_COPY:%.+]] = phi{{.+}} [ [[S_ARR_ADDR_BGN]], {{.+}} ], [ [[S_ARR_SRC:%.+]], {{.+}} ] |
| 439 | // CHECK-DAG: [[S_ARR_DST_COPY:%.+]] = phi{{.+}} [ [[S_ARR_PRIV_BGN]], {{.+}} ], [ [[S_ARR_DST:%.+]], {{.+}} ] |
| 440 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP1]]) |
| 441 | // CHECK-DAG: call void @{{.+}}({{.+}} [[S_ARR_DST_COPY]], {{.+}} [[S_ARR_SRC_COPY]], {{.+}} [[AGG_TMP1]]) |
| 442 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP1]]) |
| 443 | // CHECK-DAG: [[S_ARR_DST]] = getelementptr {{.+}} [[S_ARR_DST_COPY]], |
| 444 | // CHECK-DAG: [[S_ARR_SRC]] = getelementptr {{.+}} [[S_ARR_SRC_COPY]], |
| 445 | |
| 446 | // firstprivate(var) |
| 447 | // CHECK-DAG: [[VAR_ADDR_REF:%.+]] = load{{.+}} [[VAR_ADDR]], |
| 448 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP2]]) |
| 449 | // CHECK-DAG: call void @{{.+}}({{.+}} [[VAR_PRIV]], {{.+}} [[VAR_ADDR_REF]], {{.+}} [[AGG_TMP2]]) |
| 450 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP2]]) |
| 451 | // CHECK-DAG: store [[S_INT_TY]]* [[VAR_PRIV]], [[S_INT_TY]]** [[TMP]], |
| 452 | |
| 453 | // CHECK: call void @__kmpc_for_static_init_4( |
| 454 | // CHECK: call void {{.*}} @__kmpc_fork_call({{.+}}, {{.+}}, {{.+}} @[[TPAR_OUTL:.+]] to |
| 455 | // CHECK: call void @__kmpc_for_static_fini( |
| 456 | // CHECK: ret void |
| 457 | |
| 458 | // CHECK: define internal void @[[TPAR_OUTL]]({{.+}}) |
| 459 | // Skip global and bound tid vars |
| 460 | // CHECK: {{.+}} = alloca i32*, |
| 461 | // CHECK: {{.+}} = alloca i32*, |
| 462 | // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, |
| 463 | // CHECK: [[T_VAR_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 464 | // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_INT_TY]]]*, |
| 465 | // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]]*, |
| 466 | // Skip temp vars for loop |
| 467 | // CHECK: alloca i{{[0-9]+}}, |
| 468 | // CHECK: alloca i{{[0-9]+}}, |
| 469 | // CHECK: alloca i{{[0-9]+}}, |
| 470 | // CHECK: alloca i{{[0-9]+}}, |
| 471 | // CHECK: alloca i{{[0-9]+}}, |
| 472 | // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], |
| 473 | // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]], |
| 474 | // CHECK: [[AGG_TMP1:%.+]] = alloca [[ST_TY]], |
| 475 | // CHECK: [[VAR_PRIV:%.+]] = alloca [[S_INT_TY]], |
| 476 | // CHECK: [[AGG_TMP2:%.+]] = alloca [[ST_TY]], |
| 477 | // CHECK: [[TMP:%.+]] = alloca [[S_INT_TY]]*, |
| 478 | |
| 479 | // param copy |
| 480 | // CHECK: store [2 x i{{[0-9]+}}]* {{.+}}, [2 x i{{[0-9]+}}]** [[VEC_ADDR]], |
| 481 | // CHECK: store i{{[0-9]+}} {{.+}}, i{{[0-9]+}}* [[T_VAR_ADDR]], |
| 482 | // CHECK: store [2 x [[S_INT_TY]]]* {{.+}}, [2 x [[S_INT_TY]]]** [[S_ARR_ADDR]], |
| 483 | // CHECK: store [[S_INT_TY]]* {{.+}}, [[S_INT_TY]]** [[VAR_ADDR]], |
| 484 | |
| 485 | // T_VAR and preparation variables |
| 486 | // CHECK: [[VEC_ADDR_VAL:%.+]] = load [2 x i{{[0-9]+}}]*, [2 x i{{[0-9]+}}]** [[VEC_ADDR]], |
| 487 | // CHECK-64: [[CONV_TVAR:%.+]] = bitcast i64* [[T_VAR_ADDR]] to i32* |
| 488 | // CHECK: [[S_ARR_ADDR_REF:%.+]] = load [2 x [[S_INT_TY]]]*, [2 x [[S_INT_TY]]]** [[S_ARR_ADDR]], |
| 489 | |
| 490 | // firstprivate vec(vec): copy from *_addr into priv1 and then from priv1 into priv2 |
| 491 | // CHECK-DAG: [[VEC_DEST_PRIV:%.+]] = bitcast [2 x i{{[0-9]+}}]* [[VEC_PRIV]] to i8* |
| 492 | // CHECK-DAG: [[VEC_SRC:%.+]] = bitcast [2 x i{{[0-9]+}}]* [[VEC_ADDR_VAL]] to i8* |
| 493 | // CHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[VEC_DEST_PRIV]], i8* align {{[0-9]+}} [[VEC_SRC]], {{.+}}) |
| 494 | |
| 495 | // firstprivate(s_arr) |
| 496 | // CHECK-DAG: [[S_ARR_PRIV_BGN:%.+]] = getelementptr{{.*}} [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[S_ARR_PRIV]], |
| 497 | // CHECK-DAG: [[S_ARR_ADDR_BGN:%.+]] = bitcast [2 x [[S_INT_TY]]]* [[S_ARR_ADDR_REF]] to |
| 498 | // CHECK-DAG: [[S_ARR_FIN:%.+]] = icmp{{.+}} [[S_ARR_PRIV_BGN]], |
| 499 | // CHECK-DAG: [[S_ARR_SRC_COPY:%.+]] = phi{{.+}} [ [[S_ARR_ADDR_BGN]], {{.+}} ], [ [[S_ARR_SRC:%.+]], {{.+}} ] |
| 500 | // CHECK-DAG: [[S_ARR_DST_COPY:%.+]] = phi{{.+}} [ [[S_ARR_PRIV_BGN]], {{.+}} ], [ [[S_ARR_DST:%.+]], {{.+}} ] |
| 501 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP1]]) |
| 502 | // CHECK-DAG: call void @{{.+}}({{.+}} [[S_ARR_DST_COPY]], {{.+}} [[S_ARR_SRC_COPY]], {{.+}} [[AGG_TMP1]]) |
| 503 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP1]]) |
| 504 | // CHECK-DAG: [[S_ARR_DST]] = getelementptr {{.+}} [[S_ARR_DST_COPY]], |
| 505 | // CHECK-DAG: [[S_ARR_SRC]] = getelementptr {{.+}} [[S_ARR_SRC_COPY]], |
| 506 | |
| 507 | // firstprivate(var) |
| 508 | // CHECK-DAG: [[VAR_ADDR_REF:%.+]] = load{{.+}} [[VAR_ADDR]], |
| 509 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP2]]) |
| 510 | // CHECK-DAG: call void @{{.+}}({{.+}} [[VAR_PRIV]], {{.+}} [[VAR_ADDR_REF]], {{.+}} [[AGG_TMP2]]) |
| 511 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP2]]) |
| 512 | // CHECK-DAG: store [[S_INT_TY]]* [[VAR_PRIV]], [[S_INT_TY]]** [[TMP]], |
| 513 | |
| 514 | // CHECK: call void @__kmpc_for_static_init_4( |
| 515 | // CHECK-32-DAG: {{.+}} = {{.+}} [[T_VAR_ADDR]] |
| 516 | // CHECK-64-DAG: {{.+}} = {{.+}} [[CONV_TVAR]] |
| 517 | // CHECK-DAG: {{.+}} = {{.+}} [[VEC_PRIV]] |
| 518 | // CHECK-DAG: {{.+}} = {{.+}} [[TMP]] |
| 519 | // CHECK-DAG: {{.+}} = {{.+}} [[S_ARR_PRIV]] |
| 520 | // CHECK: call void @__kmpc_for_static_fini( |
| 521 | // CHECK: ret void |
| 522 | |
| 523 | #endif |
| 524 | |