1 | // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-target | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 |
2 | // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-target |
3 | // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-target | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 |
4 | // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-target | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 |
5 | // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-target |
6 | // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-target | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 |
7 | |
8 | // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-target | FileCheck --check-prefix SIMD-ONLY0 %s |
9 | // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-target |
10 | // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-target | FileCheck --check-prefix SIMD-ONLY0 %s |
11 | // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-target | FileCheck --check-prefix SIMD-ONLY0 %s |
12 | // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-target |
13 | // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-target | FileCheck --check-prefix SIMD-ONLY0 %s |
14 | // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} |
15 | |
16 | // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-target | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 |
17 | // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-target |
18 | // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-target | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 |
19 | |
20 | // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-target | FileCheck --check-prefix SIMD-ONLY1 %s |
21 | // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-target |
22 | // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-target | FileCheck --check-prefix SIMD-ONLY1 %s |
23 | // SIMD-ONLY1-NOT: {{__kmpc|__tgt}} |
24 | |
25 | // expected-no-diagnostics |
26 | #ifndef HEADER |
27 | #define HEADER |
28 | |
29 | struct St { |
30 | int a, b; |
31 | St() : a(0), b(0) {} |
32 | St(const St &st) : a(st.a + st.b), b(0) {} |
33 | ~St() {} |
34 | }; |
35 | |
36 | volatile int g = 1212; |
37 | volatile int &g1 = g; |
38 | |
39 | template <class T> |
40 | struct S { |
41 | T f; |
42 | S(T a) : f(a + g) {} |
43 | S() : f(g) {} |
44 | S(const S &s, St t = St()) : f(s.f + t.a) {} |
45 | operator T() { return T(); } |
46 | ~S() {} |
47 | }; |
48 | |
49 | // CHECK-DAG: [[S_FLOAT_TY:%.+]] = type { float } |
50 | // CHECK-DAG: [[S_INT_TY:%.+]] = type { i{{[0-9]+}} } |
51 | // CHECK-DAG: [[ST_TY:%.+]] = type { i{{[0-9]+}}, i{{[0-9]+}} } |
52 | |
53 | template <typename T> |
54 | T tmain() { |
55 | S<T> test; |
56 | T t_var = T(); |
57 | T vec[] = {1, 2}; |
58 | S<T> s_arr[] = {1, 2}; |
59 | S<T> &var = test; |
60 | #pragma omp target |
61 | #pragma omp teams distribute parallel for firstprivate(t_var, vec, s_arr, var) |
62 | for (int i = 0; i < 2; ++i) { |
63 | vec[i] = t_var; |
64 | s_arr[i] = var; |
65 | } |
66 | return T(); |
67 | } |
68 | |
69 | // CHECK-DAG: [[TEST:@.+]] = global [[S_FLOAT_TY]] zeroinitializer, |
70 | S<float> test; |
71 | // CHECK-DAG: [[T_VAR:@.+]] = global i{{[0-9]+}} 333, |
72 | int t_var = 333; |
73 | // CHECK-DAG: [[VEC:@.+]] = global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2], |
74 | int vec[] = {1, 2}; |
75 | // CHECK-DAG: [[S_ARR:@.+]] = global [2 x [[S_FLOAT_TY]]] zeroinitializer, |
76 | S<float> s_arr[] = {1, 2}; |
77 | // CHECK-DAG: [[VAR:@.+]] = global [[S_FLOAT_TY]] zeroinitializer, |
78 | S<float> var(3); |
79 | // CHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0, |
80 | |
81 | int main() { |
82 | static int sivar; |
83 | #ifdef LAMBDA |
84 | // LAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212, |
85 | // LAMBDA-LABEL: @main |
86 | // LAMBDA: call void [[OUTER_LAMBDA:@.+]]( |
87 | [&]() { |
88 | // LAMBDA: define{{.*}} internal{{.*}} void [[OUTER_LAMBDA]]( |
89 | // LAMBDA: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) |
90 | // LAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} %{{.+}}) |
91 | // LAMBDA: ret |
92 | #pragma omp target |
93 | #pragma omp teams distribute parallel for firstprivate(g, g1, sivar) |
94 | for (int i = 0; i < 2; ++i) { |
95 | // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}}) |
96 | // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, |
97 | // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, |
98 | // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, |
99 | // LAMBDA: [[G_CAST:%.+]] = alloca i{{[0-9]+}}, |
100 | // LAMBDA: [[G1_CAST:%.+]] = alloca i{{[0-9]+}}, |
101 | // LAMBDA: [[SIVAR_CAST:%.+]] = alloca i{{[0-9]+}}, |
102 | // LAMBDA-DAG: [[G_CAST_VAL:%.+]] = load{{.+}} [[G_CAST]], |
103 | // LAMBDA-DAG: [[G1_CAST_VAL:%.+]] = load{{.+}} [[G1_CAST]], |
104 | // LAMBDA-DAG: [[SIVAR_CAST_VAL:%.+]] = load{{.+}} [[SIVAR_CAST]], |
105 | // LAMBDA: call void {{.+}} @__kmpc_fork_teams({{.+}}, i32 3, {{.+}} @[[LOUTL1:.+]] to {{.+}}, {{.+}} [[G_CAST_VAL]], {{.+}} [[G1_CAST_VAL]], {{.+}} [[SIVAR_CAST_VAL]]) |
106 | // LAMBDA: ret void |
107 | |
108 | // LAMBDA: define internal void @[[LOUTL1]]({{.+}}) |
109 | // Skip global and bound tid vars |
110 | // LAMBDA: {{.+}} = alloca i32*, |
111 | // LAMBDA: {{.+}} = alloca i32*, |
112 | // LAMBDA: [[G_ADDR:%.+]] = alloca i{{[0-9]+}}, |
113 | // LAMBDA: [[G1_ADDR:%.+]] = alloca i{{[0-9]+}}, |
114 | // LAMBDA: [[SIVAR_ADDR:%.+]] = alloca i{{[0-9]+}}, |
115 | // LAMBDA: [[G1_TMP:%.+]] = alloca i32*, |
116 | // skip loop vars |
117 | // LAMBDA-DAG: store {{.+}}, {{.+}} [[G_ADDR]], |
118 | // LAMBDA-DAG: store {{.+}}, {{.+}} [[G1_ADDR]], |
119 | // LAMBDA-DAG: store {{.+}}, {{.+}} [[SIVAR_ADDR]], |
120 | // LAMBDA-DAG: [[G_CONV:%.+]] = bitcast {{.+}} [[G_ADDR]] to |
121 | // LAMBDA-DAG: [[G1_CONV:%.+]] = bitcast {{.+}} [[G1_ADDR]] to |
122 | // LAMBDA-DAG: [[SIVAR_CONV:%.+]] = bitcast {{.+}} [[SIVAR_ADDR]] to |
123 | // LAMBDA-DAG: store{{.+}} [[G1_CONV]], {{.+}} [[G1_TMP]], |
124 | g = 1; |
125 | g1 = 1; |
126 | sivar = 2; |
127 | // LAMBDA: call void @__kmpc_for_static_init_4( |
128 | // LAMBDA: call void {{.*}} @__kmpc_fork_call({{.+}}, {{.+}}, {{.+}} @[[LPAR_OUTL:.+]] to |
129 | // LAMBDA: call void @__kmpc_for_static_fini( |
130 | // LAMBDA: ret void |
131 | |
132 | // LAMBDA: define internal void @[[LPAR_OUTL]]({{.+}}) |
133 | // Skip global and bound tid vars, and prev lb and ub vars |
134 | // LAMBDA: {{.+}} = alloca i32*, |
135 | // LAMBDA: {{.+}} = alloca i32*, |
136 | // LAMBDA: {{.+}} = alloca i{{[0-9]+}}, |
137 | // LAMBDA: {{.+}} = alloca i{{[0-9]+}}, |
138 | // LAMBDA: [[G_ADDR:%.+]] = alloca i{{[0-9]+}}, |
139 | // LAMBDA: [[G1_ADDR:%.+]] = alloca i{{[0-9]+}}, |
140 | // LAMBDA: [[SIVAR_ADDR:%.+]] = alloca i{{[0-9]+}}, |
141 | // LAMBDA: [[G1_TMP:%.+]] = alloca i32*, |
142 | // skip loop vars |
143 | // LAMBDA-DAG: store {{.+}}, {{.+}} [[G_ADDR]], |
144 | // LAMBDA-DAG: store {{.+}}, {{.+}} [[G1_ADDR]], |
145 | // LAMBDA-DAG: store {{.+}}, {{.+}} [[SIVAR_ADDR]], |
146 | // LAMBDA-DAG: [[G_CONV:%.+]] = bitcast {{.+}} [[G_ADDR]] to |
147 | // LAMBDA-DAG: [[G1_CONV:%.+]] = bitcast {{.+}} [[G1_ADDR]] to |
148 | // LAMBDA-DAG: [[SIVAR_CONV:%.+]] = bitcast {{.+}} [[SIVAR_ADDR]] to |
149 | // LAMBDA-DAG: store{{.+}} [[G1_CONV]], {{.+}} [[G1_TMP]], |
150 | |
151 | // use of private vars |
152 | // LAMBDA-DAG: store{{.+}} 1, {{.+}} [[G_CONV]], |
153 | // LAMBDA-DAG: [[G1:%.+]] = load{{.+}}, {{.+}}* [[G1_TMP]] |
154 | // LAMBDA-DAG: store{{.+}} 1, {{.+}} [[G1]], |
155 | // LAMBDA-DAG: store{{.+}} 2, {{.+}} [[SIVAR_CONV]], |
156 | // LAMBDA-DAG: [[G1_REF:%.+]] = load{{.+}}, {{.+}} [[G1_TMP]], |
157 | // LAMBDA: call void [[INNER_LAMBDA:@.+]]( |
158 | // LAMBDA: call void @__kmpc_for_static_fini( |
159 | // LAMBDA: ret void |
160 | [&]() { |
161 | // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) |
162 | // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], |
163 | g = 2; |
164 | g1 = 2; |
165 | sivar = 4; |
166 | // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] |
167 | |
168 | // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 |
169 | // LAMBDA: [[G_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[G_PTR_REF]] |
170 | // LAMBDA: store i{{[0-9]+}} 2, i{{[0-9]+}}* [[G_REF]] |
171 | // LAMBDA: [[G1_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 |
172 | // LAMBDA: [[G1_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[G1_PTR_REF]] |
173 | // LAMBDA: store i{{[0-9]+}} 2, i{{[0-9]+}}* [[G1_REF]] |
174 | // LAMBDA: [[SIVAR_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 |
175 | // LAMBDA: [[SIVAR_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[SIVAR_PTR_REF]] |
176 | // LAMBDA: store i{{[0-9]+}} 4, i{{[0-9]+}}* [[SIVAR_REF]] |
177 | }(); |
178 | } |
179 | }(); |
180 | return 0; |
181 | #else |
182 | #pragma omp target |
183 | #pragma omp teams distribute parallel for firstprivate(t_var, vec, s_arr, var, sivar) |
184 | for (int i = 0; i < 2; ++i) { |
185 | vec[i] = t_var; |
186 | s_arr[i] = var; |
187 | sivar += i; |
188 | } |
189 | return tmain<int>(); |
190 | #endif |
191 | } |
192 | |
193 | // CHECK: define {{.*}}i{{[0-9]+}} @main() |
194 | // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 5, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) |
195 | // CHECK: call void @[[OFFL1:.+]](i{{64|32}} %{{.+}}) |
196 | // CHECK: {{%.+}} = call{{.*}} i32 @[[TMAIN_INT:.+]]() |
197 | // CHECK: ret |
198 | |
199 | // CHECK: define{{.*}} void @[[OFFL1]]({{.+}}) |
200 | // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, |
201 | // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}]*, |
202 | // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]]*, |
203 | // CHECK: [[VAR_PRIV:%.+]] = alloca [[S_FLOAT_TY]]*, |
204 | // CHECK: [[SIVAR_PRIV:%.+]] = alloca i{{[0-9]+}}, |
205 | // CHECK: [[T_VAR_CAST:%.+]] = alloca i{{[0-9]+}}, |
206 | // CHECK: [[SIVAR_CAST:%.+]] = alloca i{{[0-9]+}}, |
207 | |
208 | // CHECK-DAG: [[VEC_TE_PAR:%.+]] = load [2 x i{{[0-9]+}}]*, [2 x i{{[0-9]+}}]** [[VEC_PRIV]], |
209 | // CHECK-DAG: [[T_VAR_TE_PAR:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[T_VAR_CAST]], |
210 | // CHECK-DAG: [[S_ARR_TE_PAR:%.+]] = load [2 x [[S_FLOAT_TY]]]*, [2 x [[S_FLOAT_TY]]]** [[S_ARR_PRIV]], |
211 | // CHECK-DAG: [[VAR_TE_PAR:%.+]] = load [[S_FLOAT_TY]]*, [[S_FLOAT_TY]]** [[VAR_PRIV]], |
212 | // CHECK-DAG: [[SIVAR_TE_PAR:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[SIVAR_CAST]], |
213 | |
214 | // CHECK: call void {{.+}} @__kmpc_fork_teams({{.+}}, i32 5, {{.+}} @[[OUTL1:.+]] to {{.+}}, [2 x i{{[0-9]+}}]* [[VEC_TE_PAR]], i{{[0-9]+}} [[T_VAR_TE_PAR]], [2 x [[S_FLOAT_TY]]]* [[S_ARR_TE_PAR]], [[S_FLOAT_TY]]* [[VAR_TE_PAR]], i{{[0-9]+}} [[SIVAR_TE_PAR]]) |
215 | // CHECK: ret void |
216 | |
217 | // CHECK: define internal void @[[OUTL1]]({{.+}}) |
218 | // Skip global and bound tid vars |
219 | // CHECK: {{.+}} = alloca i32*, |
220 | // CHECK: {{.+}} = alloca i32*, |
221 | // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, |
222 | // CHECK: [[T_VAR_ADDR:%.+]] = alloca i{{[0-9]+}}, |
223 | // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_FLOAT_TY]]]*, |
224 | // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_FLOAT_TY]]*, |
225 | // CHECK: [[SIVAR_ADDR:%.+]] = alloca i{{[0-9]+}}, |
226 | // Skip temp vars for loop |
227 | // CHECK: alloca i{{[0-9]+}}, |
228 | // CHECK: alloca i{{[0-9]+}}, |
229 | // CHECK: alloca i{{[0-9]+}}, |
230 | // CHECK: alloca i{{[0-9]+}}, |
231 | // CHECK: alloca i{{[0-9]+}}, |
232 | // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], |
233 | // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]], |
234 | // CHECK: [[AGG_TMP1:%.+]] = alloca [[ST_TY]], |
235 | // CHECK: [[VAR_PRIV:%.+]] = alloca [[S_FLOAT_TY]], |
236 | // CHECK: [[AGG_TMP2:%.+]] = alloca [[ST_TY]], |
237 | |
238 | // param copy |
239 | // CHECK: store [2 x i{{[0-9]+}}]* {{.+}}, [2 x i{{[0-9]+}}]** [[VEC_ADDR]], |
240 | // CHECK: store i{{[0-9]+}} {{.+}}, i{{[0-9]+}}* [[T_VAR_ADDR]], |
241 | // CHECK: store [2 x [[S_FLOAT_TY]]]* {{.+}}, [2 x [[S_FLOAT_TY]]]** [[S_ARR_ADDR]], |
242 | // CHECK: store [[S_FLOAT_TY]]* {{.+}}, [[S_FLOAT_TY]]** [[VAR_ADDR]], |
243 | // CHECK: store i{{[0-9]+}} {{.+}}, i{{[0-9]+}}* [[SIVAR_ADDR]], |
244 | |
245 | // T_VAR and SIVAR |
246 | // CHECK-64-DAG: [[CONV_TVAR:%.+]] = bitcast i64* [[T_VAR_ADDR]] to i32* |
247 | // CHECK-64-DAG: [[CONV_SIVAR:%.+]] = bitcast i64* [[SIVAR_ADDR]] to i32* |
248 | |
249 | // preparation vars |
250 | // CHECK-DAG: [[VEC_ADDR_VAL:%.+]] = load [2 x i{{[0-9]+}}]*, [2 x i{{[0-9]+}}]** [[VEC_ADDR]], |
251 | // CHECK-DAG: [[S_ARR_ADDR_REF:%.+]] = load [2 x [[S_FLOAT_TY]]]*, [2 x [[S_FLOAT_TY]]]** [[S_ARR_ADDR]], |
252 | // CHECK-DAG: [[VAR_ADDR_REF:%.+]] = load{{.+}} [[VAR_ADDR]], |
253 | |
254 | // firstprivate vec(vec): copy from *_addr into priv1 and then from priv1 into priv2 |
255 | // CHECK-DAG: [[VEC_DEST_PRIV:%.+]] = bitcast [2 x i{{[0-9]+}}]* [[VEC_PRIV]] to i8* |
256 | // CHECK-DAG: [[VEC_SRC:%.+]] = bitcast [2 x i{{[0-9]+}}]* [[VEC_ADDR_VAL]] to i8* |
257 | // CHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[VEC_DEST_PRIV]], i8* align {{[0-9]+}} [[VEC_SRC]], {{.+}}) |
258 | |
259 | // firstprivate(s_arr) |
260 | // CHECK-DAG: [[S_ARR_PRIV_BGN:%.+]] = getelementptr{{.*}} [2 x [[S_FLOAT_TY]]], [2 x [[S_FLOAT_TY]]]* [[S_ARR_PRIV]], |
261 | // CHECK-DAG: [[S_ARR_ADDR_BGN:%.+]] = bitcast [2 x [[S_FLOAT_TY]]]* [[S_ARR_ADDR_REF]] to |
262 | // CHECK-DAG: [[S_ARR_FIN:%.+]] = icmp{{.+}} [[S_ARR_PRIV_BGN]], |
263 | // CHECK-DAG: [[S_ARR_SRC_COPY:%.+]] = phi{{.+}} [ [[S_ARR_ADDR_BGN]], {{.+}} ], [ [[S_ARR_SRC:%.+]], {{.+}} ] |
264 | // CHECK-DAG: [[S_ARR_DST_COPY:%.+]] = phi{{.+}} [ [[S_ARR_PRIV_BGN]], {{.+}}], [ [[S_ARR_DST:%.+]], {{.+}} ] |
265 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP1]]) |
266 | // CHECK-DAG: call void @{{.+}}({{.+}} [[S_ARR_DST_COPY]], {{.+}} [[S_ARR_SRC_COPY]], {{.+}} [[AGG_TMP1]]) |
267 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP1]]) |
268 | // CHECK-DAG: [[S_ARR_DST]] = getelementptr {{.+}} [[S_ARR_DST_COPY]], |
269 | // CHECK-DAG: [[S_ARR_SRC]] = getelementptr {{.+}} [[S_ARR_SRC_COPY]], |
270 | |
271 | // firstprivate(var) |
272 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP2]]) |
273 | // CHECK-DAG: call void @{{.+}}({{.+}} [[VAR_PRIV]], {{.+}} [[VAR_ADDR_REF]], {{.+}} [[AGG_TMP2]]) |
274 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP2]]) |
275 | |
276 | // CHECK: call void @__kmpc_for_static_init_4( |
277 | // CHECK: call void {{.*}} @__kmpc_fork_call({{.+}}, {{.+}}, {{.+}} @[[PAR_OUTL:.+]] to |
278 | // CHECK: call void @__kmpc_for_static_fini( |
279 | // CHECK: ret void |
280 | |
281 | // CHECK: define internal void @[[PAR_OUTL]]({{.+}}) |
282 | // Skip global and bound tid vars, and prev lb ub vars |
283 | // CHECK: {{.+}} = alloca i32*, |
284 | // CHECK: {{.+}} = alloca i32*, |
285 | // CHECK: {{.+}} = alloca i{{[0-9]+}}, |
286 | // CHECK: {{.+}} = alloca i{{[0-9]+}}, |
287 | // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, |
288 | // CHECK: [[T_VAR_ADDR:%.+]] = alloca i{{[0-9]+}}, |
289 | // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_FLOAT_TY]]]*, |
290 | // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_FLOAT_TY]]*, |
291 | // CHECK: [[SIVAR_ADDR:%.+]] = alloca i{{[0-9]+}}, |
292 | // Skip temp vars for loop |
293 | // CHECK: alloca i{{[0-9]+}}, |
294 | // CHECK: alloca i{{[0-9]+}}, |
295 | // CHECK: alloca i{{[0-9]+}}, |
296 | // CHECK: alloca i{{[0-9]+}}, |
297 | // CHECK: alloca i{{[0-9]+}}, |
298 | // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], |
299 | // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]], |
300 | // CHECK: [[AGG_TMP1:%.+]] = alloca [[ST_TY]], |
301 | // CHECK: [[VAR_PRIV:%.+]] = alloca [[S_FLOAT_TY]], |
302 | // CHECK: [[AGG_TMP2:%.+]] = alloca [[ST_TY]], |
303 | |
304 | // param copy |
305 | // CHECK: store [2 x i{{[0-9]+}}]* {{.+}}, [2 x i{{[0-9]+}}]** [[VEC_ADDR]], |
306 | // CHECK: store i{{[0-9]+}} {{.+}}, i{{[0-9]+}}* [[T_VAR_ADDR]], |
307 | // CHECK: store [2 x [[S_FLOAT_TY]]]* {{.+}}, [2 x [[S_FLOAT_TY]]]** [[S_ARR_ADDR]], |
308 | // CHECK: store [[S_FLOAT_TY]]* {{.+}}, [[S_FLOAT_TY]]** [[VAR_ADDR]], |
309 | // CHECK: store i{{[0-9]+}} {{.+}}, i{{[0-9]+}}* [[SIVAR_ADDR]], |
310 | |
311 | // T_VAR and SIVAR |
312 | // CHECK-64-DAG: [[CONV_TVAR:%.+]] = bitcast i64* [[T_VAR_ADDR]] to i32* |
313 | // CHECK-64-DAG: [[CONV_SIVAR:%.+]] = bitcast i64* [[SIVAR_ADDR]] to i32* |
314 | |
315 | // preparation vars |
316 | // CHECK-DAG: [[VEC_ADDR_VAL:%.+]] = load [2 x i{{[0-9]+}}]*, [2 x i{{[0-9]+}}]** [[VEC_ADDR]], |
317 | // CHECK-DAG: [[S_ARR_ADDR_REF:%.+]] = load [2 x [[S_FLOAT_TY]]]*, [2 x [[S_FLOAT_TY]]]** [[S_ARR_ADDR]], |
318 | // CHECK-DAG: [[VAR_ADDR_REF:%.+]] = load{{.+}} [[VAR_ADDR]], |
319 | |
320 | // firstprivate vec(vec): copy from *_addr into priv1 and then from priv1 into priv2 |
321 | // CHECK-DAG: [[VEC_DEST_PRIV:%.+]] = bitcast [2 x i{{[0-9]+}}]* [[VEC_PRIV]] to i8* |
322 | // CHECK-DAG: [[VEC_SRC:%.+]] = bitcast [2 x i{{[0-9]+}}]* [[VEC_ADDR_VAL]] to i8* |
323 | // CHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[VEC_DEST_PRIV]], i8* align {{[0-9]+}} [[VEC_SRC]], {{.+}}) |
324 | |
325 | // firstprivate(s_arr) |
326 | // CHECK-DAG: [[S_ARR_PRIV_BGN:%.+]] = getelementptr{{.*}} [2 x [[S_FLOAT_TY]]], [2 x [[S_FLOAT_TY]]]* [[S_ARR_PRIV]], |
327 | // CHECK-DAG: [[S_ARR_ADDR_BGN:%.+]] = bitcast [2 x [[S_FLOAT_TY]]]* [[S_ARR_ADDR_REF]] to |
328 | // CHECK-DAG: [[S_ARR_FIN:%.+]] = icmp{{.+}} [[S_ARR_PRIV_BGN]], |
329 | // CHECK-DAG: [[S_ARR_SRC_COPY:%.+]] = phi{{.+}} [ [[S_ARR_ADDR_BGN]], {{.+}} ], [ [[S_ARR_SRC:%.+]], {{.+}} ] |
330 | // CHECK-DAG: [[S_ARR_DST_COPY:%.+]] = phi{{.+}} [ [[S_ARR_PRIV_BGN]], {{.+}}], [ [[S_ARR_DST:%.+]], {{.+}} ] |
331 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP1]]) |
332 | // CHECK-DAG: call void @{{.+}}({{.+}} [[S_ARR_DST_COPY]], {{.+}} [[S_ARR_SRC_COPY]], {{.+}} [[AGG_TMP1]]) |
333 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP1]]) |
334 | // CHECK-DAG: [[S_ARR_DST]] = getelementptr {{.+}} [[S_ARR_DST_COPY]], |
335 | // CHECK-DAG: [[S_ARR_SRC]] = getelementptr {{.+}} [[S_ARR_SRC_COPY]], |
336 | |
337 | // firstprivate(var) |
338 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP2]]) |
339 | // CHECK-DAG: call void @{{.+}}({{.+}} [[VAR_PRIV]], {{.+}} [[VAR_ADDR_REF]], {{.+}} [[AGG_TMP2]]) |
340 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP2]]) |
341 | |
342 | // CHECK: call void @__kmpc_for_static_init_4( |
343 | // CHECK-32-DAG: {{.+}} = {{.+}} [[T_VAR_ADDR]] |
344 | // CHECK-64-DAG: {{.+}} = {{.+}} [[CONV_TVAR]] |
345 | // CHECK-DAG: {{.+}} = {{.+}} [[VEC_PRIV]] |
346 | // CHECK-DAG: {{.+}} = {{.+}} [[S_ARR_PRIV]] |
347 | // CHECK-DAG: {{.+}} = {{.+}} [[VAR_PRIV]] |
348 | // CHECK-32-DAG: {{.+}} = {{.+}} [[SIVAR_ADDR]] |
349 | // CHECK-64-DAG: {{.+}} = {{.+}} [[CONV_SIVAR]] |
350 | // CHECK: call void @__kmpc_for_static_fini( |
351 | // CHECK: ret void |
352 | |
353 | // CHECK: define{{.*}} i{{[0-9]+}} @[[TMAIN_INT]]() |
354 | // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 4, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) |
355 | // CHECK: call void @[[TOFFL1:.+]](i{{64|32}} %{{.+}}) |
356 | // CHECK: ret |
357 | |
358 | // CHECK: define {{.*}}void @[[TOFFL1]]({{.+}}) |
359 | // CHECK: [[TT_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, |
360 | // CHECK: [[TVEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}]*, |
361 | // CHECK: [[TS_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]]*, |
362 | // CHECK: [[TVAR_PRIV:%.+]] = alloca [[S_INT_TY]]*, |
363 | // CHECK: [[TT_VAR_CAST:%.+]] = alloca i{{[0-9]+}}, |
364 | |
365 | // CHECK-DAG: [[TVEC_TE_PAR:%.+]] = load [2 x i{{[0-9]+}}]*, [2 x i{{[0-9]+}}]** [[TVEC_PRIV]], |
366 | // CHECK-DAG: [[TT_VAR_TE_PAR:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[TT_VAR_CAST]], |
367 | // CHECK-DAG: [[TS_ARR_TE_PAR:%.+]] = load [2 x [[S_INT_TY]]]*, [2 x [[S_INT_TY]]]** [[TS_ARR_PRIV]], |
368 | // CHECK-DAG: [[TVAR_TE_PAR:%.+]] = load [[S_INT_TY]]*, [[S_INT_TY]]** [[TVAR_PRIV]], |
369 | |
370 | // CHECK: call void {{.+}} @__kmpc_fork_teams({{.+}}, i32 4, {{.+}} @[[TOUTL1:.+]] to {{.+}}, [2 x i{{[0-9]+}}]* [[TVEC_TE_PAR]], i{{[0-9]+}} [[TT_VAR_TE_PAR]], [2 x [[S_INT_TY]]]* [[TS_ARR_TE_PAR]], [[S_INT_TY]]* [[TVAR_TE_PAR]]) |
371 | // CHECK: ret void |
372 | |
373 | // CHECK: define internal void @[[TOUTL1]]({{.+}}) |
374 | // Skip global and bound tid vars |
375 | // CHECK: {{.+}} = alloca i32*, |
376 | // CHECK: {{.+}} = alloca i32*, |
377 | // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, |
378 | // CHECK: [[T_VAR_ADDR:%.+]] = alloca i{{[0-9]+}}, |
379 | // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_INT_TY]]]*, |
380 | // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]]*, |
381 | // Skip temp vars for loop |
382 | // CHECK: alloca i{{[0-9]+}}, |
383 | // CHECK: alloca i{{[0-9]+}}, |
384 | // CHECK: alloca i{{[0-9]+}}, |
385 | // CHECK: alloca i{{[0-9]+}}, |
386 | // CHECK: alloca i{{[0-9]+}}, |
387 | // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], |
388 | // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]], |
389 | // CHECK: [[AGG_TMP1:%.+]] = alloca [[ST_TY]], |
390 | // CHECK: [[VAR_PRIV:%.+]] = alloca [[S_INT_TY]], |
391 | // CHECK: [[AGG_TMP2:%.+]] = alloca [[ST_TY]], |
392 | // CHECK: [[TMP:%.+]] = alloca [[S_INT_TY]]*, |
393 | |
394 | // param copy |
395 | // CHECK: store [2 x i{{[0-9]+}}]* {{.+}}, [2 x i{{[0-9]+}}]** [[VEC_ADDR]], |
396 | // CHECK: store i{{[0-9]+}} {{.+}}, i{{[0-9]+}}* [[T_VAR_ADDR]], |
397 | // CHECK: store [2 x [[S_INT_TY]]]* {{.+}}, [2 x [[S_INT_TY]]]** [[S_ARR_ADDR]], |
398 | // CHECK: store [[S_INT_TY]]* {{.+}}, [[S_INT_TY]]** [[VAR_ADDR]], |
399 | |
400 | // T_VAR and preparation variables |
401 | // CHECK: [[VEC_ADDR_VAL:%.+]] = load [2 x i{{[0-9]+}}]*, [2 x i{{[0-9]+}}]** [[VEC_ADDR]], |
402 | // CHECK-64: [[CONV_TVAR:%.+]] = bitcast i64* [[T_VAR_ADDR]] to i32* |
403 | // CHECK: [[S_ARR_ADDR_REF:%.+]] = load [2 x [[S_INT_TY]]]*, [2 x [[S_INT_TY]]]** [[S_ARR_ADDR]], |
404 | |
405 | // firstprivate vec(vec): copy from *_addr into priv1 and then from priv1 into priv2 |
406 | // CHECK-DAG: [[VEC_DEST_PRIV:%.+]] = bitcast [2 x i{{[0-9]+}}]* [[VEC_PRIV]] to i8* |
407 | // CHECK-DAG: [[VEC_SRC:%.+]] = bitcast [2 x i{{[0-9]+}}]* [[VEC_ADDR_VAL]] to i8* |
408 | // CHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[VEC_DEST_PRIV]], i8* align {{[0-9]+}} [[VEC_SRC]], {{.+}}) |
409 | |
410 | // firstprivate(s_arr) |
411 | // CHECK-DAG: [[S_ARR_PRIV_BGN:%.+]] = getelementptr{{.*}} [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[S_ARR_PRIV]], |
412 | // CHECK-DAG: [[S_ARR_ADDR_BGN:%.+]] = bitcast [2 x [[S_INT_TY]]]* [[S_ARR_ADDR_REF]] to |
413 | // CHECK-DAG: [[S_ARR_FIN:%.+]] = icmp{{.+}} [[S_ARR_PRIV_BGN]], |
414 | // CHECK-DAG: [[S_ARR_SRC_COPY:%.+]] = phi{{.+}} [ [[S_ARR_ADDR_BGN]], {{.+}} ], [ [[S_ARR_SRC:%.+]], {{.+}} ] |
415 | // CHECK-DAG: [[S_ARR_DST_COPY:%.+]] = phi{{.+}} [ [[S_ARR_PRIV_BGN]], {{.+}} ], [ [[S_ARR_DST:%.+]], {{.+}} ] |
416 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP1]]) |
417 | // CHECK-DAG: call void @{{.+}}({{.+}} [[S_ARR_DST_COPY]], {{.+}} [[S_ARR_SRC_COPY]], {{.+}} [[AGG_TMP1]]) |
418 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP1]]) |
419 | // CHECK-DAG: [[S_ARR_DST]] = getelementptr {{.+}} [[S_ARR_DST_COPY]], |
420 | // CHECK-DAG: [[S_ARR_SRC]] = getelementptr {{.+}} [[S_ARR_SRC_COPY]], |
421 | |
422 | // firstprivate(var) |
423 | // CHECK-DAG: [[VAR_ADDR_REF:%.+]] = load{{.+}} [[VAR_ADDR]], |
424 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP2]]) |
425 | // CHECK-DAG: call void @{{.+}}({{.+}} [[VAR_PRIV]], {{.+}} [[VAR_ADDR_REF]], {{.+}} [[AGG_TMP2]]) |
426 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP2]]) |
427 | // CHECK-DAG: store [[S_INT_TY]]* [[VAR_PRIV]], [[S_INT_TY]]** [[TMP]], |
428 | |
429 | // CHECK: call void @__kmpc_for_static_init_4( |
430 | // CHECK: call void {{.*}} @__kmpc_fork_call({{.+}}, {{.+}}, {{.+}} @[[TPAR_OUTL:.+]] to |
431 | // CHECK: call void @__kmpc_for_static_fini( |
432 | // CHECK: ret void |
433 | |
434 | // CHECK: define internal void @[[TPAR_OUTL]]({{.+}}) |
435 | // Skip global and bound tid vars |
436 | // CHECK: {{.+}} = alloca i32*, |
437 | // CHECK: {{.+}} = alloca i32*, |
438 | // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, |
439 | // CHECK: [[T_VAR_ADDR:%.+]] = alloca i{{[0-9]+}}, |
440 | // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_INT_TY]]]*, |
441 | // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]]*, |
442 | // Skip temp vars for loop |
443 | // CHECK: alloca i{{[0-9]+}}, |
444 | // CHECK: alloca i{{[0-9]+}}, |
445 | // CHECK: alloca i{{[0-9]+}}, |
446 | // CHECK: alloca i{{[0-9]+}}, |
447 | // CHECK: alloca i{{[0-9]+}}, |
448 | // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], |
449 | // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]], |
450 | // CHECK: [[AGG_TMP1:%.+]] = alloca [[ST_TY]], |
451 | // CHECK: [[VAR_PRIV:%.+]] = alloca [[S_INT_TY]], |
452 | // CHECK: [[AGG_TMP2:%.+]] = alloca [[ST_TY]], |
453 | // CHECK: [[TMP:%.+]] = alloca [[S_INT_TY]]*, |
454 | |
455 | // param copy |
456 | // CHECK: store [2 x i{{[0-9]+}}]* {{.+}}, [2 x i{{[0-9]+}}]** [[VEC_ADDR]], |
457 | // CHECK: store i{{[0-9]+}} {{.+}}, i{{[0-9]+}}* [[T_VAR_ADDR]], |
458 | // CHECK: store [2 x [[S_INT_TY]]]* {{.+}}, [2 x [[S_INT_TY]]]** [[S_ARR_ADDR]], |
459 | // CHECK: store [[S_INT_TY]]* {{.+}}, [[S_INT_TY]]** [[VAR_ADDR]], |
460 | |
461 | // T_VAR and preparation variables |
462 | // CHECK: [[VEC_ADDR_VAL:%.+]] = load [2 x i{{[0-9]+}}]*, [2 x i{{[0-9]+}}]** [[VEC_ADDR]], |
463 | // CHECK-64: [[CONV_TVAR:%.+]] = bitcast i64* [[T_VAR_ADDR]] to i32* |
464 | // CHECK: [[S_ARR_ADDR_REF:%.+]] = load [2 x [[S_INT_TY]]]*, [2 x [[S_INT_TY]]]** [[S_ARR_ADDR]], |
465 | |
466 | // firstprivate vec(vec): copy from *_addr into priv1 and then from priv1 into priv2 |
467 | // CHECK-DAG: [[VEC_DEST_PRIV:%.+]] = bitcast [2 x i{{[0-9]+}}]* [[VEC_PRIV]] to i8* |
468 | // CHECK-DAG: [[VEC_SRC:%.+]] = bitcast [2 x i{{[0-9]+}}]* [[VEC_ADDR_VAL]] to i8* |
469 | // CHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[VEC_DEST_PRIV]], i8* align {{[0-9]+}} [[VEC_SRC]], {{.+}}) |
470 | |
471 | // firstprivate(s_arr) |
472 | // CHECK-DAG: [[S_ARR_PRIV_BGN:%.+]] = getelementptr{{.*}} [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[S_ARR_PRIV]], |
473 | // CHECK-DAG: [[S_ARR_ADDR_BGN:%.+]] = bitcast [2 x [[S_INT_TY]]]* [[S_ARR_ADDR_REF]] to |
474 | // CHECK-DAG: [[S_ARR_FIN:%.+]] = icmp{{.+}} [[S_ARR_PRIV_BGN]], |
475 | // CHECK-DAG: [[S_ARR_SRC_COPY:%.+]] = phi{{.+}} [ [[S_ARR_ADDR_BGN]], {{.+}} ], [ [[S_ARR_SRC:%.+]], {{.+}} ] |
476 | // CHECK-DAG: [[S_ARR_DST_COPY:%.+]] = phi{{.+}} [ [[S_ARR_PRIV_BGN]], {{.+}} ], [ [[S_ARR_DST:%.+]], {{.+}} ] |
477 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP1]]) |
478 | // CHECK-DAG: call void @{{.+}}({{.+}} [[S_ARR_DST_COPY]], {{.+}} [[S_ARR_SRC_COPY]], {{.+}} [[AGG_TMP1]]) |
479 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP1]]) |
480 | // CHECK-DAG: [[S_ARR_DST]] = getelementptr {{.+}} [[S_ARR_DST_COPY]], |
481 | // CHECK-DAG: [[S_ARR_SRC]] = getelementptr {{.+}} [[S_ARR_SRC_COPY]], |
482 | |
483 | // firstprivate(var) |
484 | // CHECK-DAG: [[VAR_ADDR_REF:%.+]] = load{{.+}} [[VAR_ADDR]], |
485 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP2]]) |
486 | // CHECK-DAG: call void @{{.+}}({{.+}} [[VAR_PRIV]], {{.+}} [[VAR_ADDR_REF]], {{.+}} [[AGG_TMP2]]) |
487 | // CHECK-DAG: call void @{{.+}}({{.+}} [[AGG_TMP2]]) |
488 | // CHECK-DAG: store [[S_INT_TY]]* [[VAR_PRIV]], [[S_INT_TY]]** [[TMP]], |
489 | |
490 | // CHECK: call void @__kmpc_for_static_init_4( |
491 | // CHECK-32-DAG: {{.+}} = {{.+}} [[T_VAR_ADDR]] |
492 | // CHECK-64-DAG: {{.+}} = {{.+}} [[CONV_TVAR]] |
493 | // CHECK-DAG: {{.+}} = {{.+}} [[VEC_PRIV]] |
494 | // CHECK-DAG: {{.+}} = {{.+}} [[TMP]] |
495 | // CHECK-DAG: {{.+}} = {{.+}} [[S_ARR_PRIV]] |
496 | // CHECK: call void @__kmpc_for_static_fini( |
497 | // CHECK: ret void |
498 | |
499 | #endif |
500 | |